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testing 2nd instance of si5351 driver

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This commit is contained in:
Tom Kuschel 2022-05-24 08:01:52 +02:00
parent c1ec2a61f1
commit 347d4394df
13 changed files with 1062 additions and 1598 deletions
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2
Core/Inc/FreeRTOSConfig.h
View File

@ -68,7 +68,7 @@
#define configTICK_RATE_HZ ((TickType_t)1000) #define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 56 ) #define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128) #define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)3000) #define configTOTAL_HEAP_SIZE ((size_t)30000)
#define configMAX_TASK_NAME_LEN ( 16 ) #define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1 #define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0 #define configUSE_16_BIT_TICKS 0

2
Core/Inc/main.h
View File

@ -57,8 +57,6 @@ void Error_Handler(void);
/* USER CODE END EFP */ /* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/ /* Private defines -----------------------------------------------------------*/
#define B1_Pin GPIO_PIN_13
#define B1_GPIO_Port GPIOC
#define LD3_Pin GPIO_PIN_14 #define LD3_Pin GPIO_PIN_14
#define LD3_GPIO_Port GPIOB #define LD3_GPIO_Port GPIOB
#define USB_OverCurrent_Pin GPIO_PIN_5 #define USB_OverCurrent_Pin GPIO_PIN_5

573
Core/Inc/stm32_si5351.h
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@ -15,10 +15,12 @@
* Afterwards, when there is a handle like "I2C_HandleTypeDef hi2c1;", * Afterwards, when there is a handle like "I2C_HandleTypeDef hi2c1;",
* you simply initialize this stm32_si5351 library in your main.c , * you simply initialize this stm32_si5351 library in your main.c ,
* just after the MX_I2C1_Init(); * just after the MX_I2C1_Init();
* so between the USER CODE like using the given i2c handle "hi2c1": * so between the USER CODE like using the given i2c handle "hi2c1" with default values:
* *
* /\* USER CODE BEGIN 2 *\/ * /\* USER CODE BEGIN 2 *\/
* si5351_init(&hi2c1); *
* si5351_inst_t si5351_inst;
* si5351_initialize(&hi2c1);
* /\* USER CODE END 2 *\/ * /\* USER CODE END 2 *\/
* *
* The 7-bit device (slave) address of the Si5351 consist of a 6-bit fixed * The 7-bit device (slave) address of the Si5351 consist of a 6-bit fixed
@ -72,8 +74,8 @@
******************************************************************************/ ******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32_SI5351_H #ifndef _STM32_SI5351_H_
#define STM32_SI5351_H #define _STM32_SI5351_H_
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -82,15 +84,17 @@ extern "C" {
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include <stdint.h> #include <stdint.h>
#include <stm32_si5351_reg.h> /* register map of the Si5351 */ #include <stm32_si5351_reg.h> /* register map of the Si5351 */
/* #include <errno.h> could also be included */
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Si5351 instance typedef */ /*!< Si5351 instance typedef -- handle as pointer */
typedef struct __SI5351_HandleTypeDef *si5351_inst_t; typedef struct __SI5351_HandleTypeDef *si5351_inst_t;
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @enum errno_t Error Number Constants, @TODO could also errno.h included!! /** @enum errno_t Error Number Constants, @TODO could also errno.h included!!
*/ */
#if !defined _SYS_ERRNO_H_ || !defined __ERRNO_H__
typedef enum { typedef enum {
EPERM = 1, /*!< Operation not permitted */ EPERM = 1, /*!< Operation not permitted */
EIO = 5, /*!< I/O error */ EIO = 5, /*!< I/O error */
@ -101,545 +105,56 @@ typedef enum {
EADDRINUSE = 98,/*!< Address already in use */ EADDRINUSE = 98,/*!< Address already in use */
ETIMEDOUT = 116 /*!< Connection timed out */ ETIMEDOUT = 116 /*!< Connection timed out */
} si5351_errno_t; } si5351_errno_t;
#endif
typedef enum {
SI5351_PLLA = 0,
SI5351_PLLB
}si5351_pll_t;
/* Exported variables --------------------------------------------------------*/ /* Exported variables --------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
#ifndef SI5351_NUMBER_OF_OUTPUTS #define __SI5351__ 1
#define SI5351_NUMBER_OF_OUTPUTS 8 #define __SI5351_MINOR__ 0
#endif #define __SI5351_PATCHLEVEL__ 0
#ifdef __arm__ #define SI5351_VERSION (__SI5351__ * 10000 \
#ifdef __ARM_BIG_ENDIAN + __SI5351_MINOR__ * 100 \
#define for_endian(size) for (int i = 0; i < size; ++i) + __SI5351_PATCHLEVEL__)
#define last_loop_endian (i==size-1)
#else #ifndef SI5351_DEFAULTS
#define for_endian(size) for (int i = size - 1; i >= 0; --i) #define SI5351_DEFAULTS 1
#define last_loop_endian (i==0) #define SI5351_NUMBER_OF_OUTPUTS 8
#endif #define SI5351_I2C_ADDRESS_DEFAULT 0x60
#else #define SI5351_XTAL_DEFAULT 25000000u // default xtal in [Hz]
#error "Endianness not detected or another compiler"
#endif #endif
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
si5351_inst_t si5351_init(void * i2c_handle, uint32_t xtal_frequency, uint8_t i2c_address); si5351_inst_t si5351_init(void * i2c_handle, uint32_t xtal_frequency, uint8_t i2c_address, size_t datasize);
int si5351_deinit(si5351_inst_t si5351_handle); int si5351_deinit(si5351_inst_t si5351_handle);
int si5351_isready(si5351_inst_t inst); int si5351_isready(si5351_inst_t inst);
int si5351_program(si5351_inst_t inst); int si5351_program(si5351_inst_t inst);
int si5351_enable_output(si5351_inst_t inst, uint8_t clk);
int si5351_disable_output(si5351_inst_t inst, uint8_t clk);
int si5351_set_clk0(si5351_inst_t inst, uint32_t frequency);
int si5351_set_clk(si5351_inst_t inst, uint32_t frequency, uint8_t clk, si5351_pll_t pll);
#if SI5351_DEFAULTS
si5351_inst_t si5351_initialize(void * i2c_handle);
int si5351_deinitialize(void);
#endif
char * si5351_read_debug_msg(si5351_inst_t inst); char * si5351_read_debug_msg(si5351_inst_t inst);
char * si5351_read_register_debug(si5351_inst_t inst, char *buf, size_t bufsize, uint8_t regaddr); char * si5351_read_register_debug(si5351_inst_t inst, char *buf, size_t bufsize, uint8_t regaddr);
/* if initialized with data get a write and read functionality for data with: */
int si5351_write_data(si5351_inst_t inst, void * data);
int si5351_read_data(si5351_inst_t inst, void * data);
#ifdef __cplusplus #ifdef __cplusplus
} /* extern "C" */ } /* extern "C" */
#endif #endif
#endif /* STM32_SI5351_H */ #endif // _STM32_SI5351_H_
/*
* si5351.h
*
* Created on: Feb 16, 2018
* Author: Petr Polasek
*
* To make this library useable on any other device than
* STM32Fxxx Cortex Mx, please edit these parts of the library:
*
* DEFINES:
* SI5351_I2C_PERIPHERAL - the I2C peripheral name according
* to your devices HAL library
* I2C_TIMEOUT - time for the communication to time out
*
* TYPEDEFS:
* Si5351_ConfigTypeDef - the I2Cx parameter should be changed
* so that its type corresponds to your HAL library
*
* FUNCTIONS:
* Si5351_WriteRegister
* Si5351_ReadRegister
* You need to write your own I2C handlers here
*
*/
#if 0
#ifndef ENABLESTATE
#define ENABLESTATE
typedef enum
{
OFF = 0,
ON = 1
} EnableState;
#endif
/*
* This section contains register addresses and bit masks for
* the device status registers.
*/
#define REG_DEV_STATUS 0
#define DEV_SYS_INIT_MASK 0x80
#define DEV_LOL_B_MASK 0x40
#define DEV_LOL_A_MASK 0x20
#define DEV_LOS_CLKIN_MASK 0x10
#define DEV_LOS_XTAL_MASK 0x08
#define DEV_REVID_MASK 0x03
#define REG_DEV_STICKY 1
#define DEV_STKY_SYS_INIT_MASK 0x80
#define DEV_STKY_LOL_B_MASK 0x40
#define DEV_STKY_LOL_A_MASK 0x20
#define DEV_STKY_LOS_CLKIN_MASK 0x10
#define DEV_STKY_LOS_XTAL_MASK 0x08
#define REG_INT_MASK 2
#define INT_MASK_SYS_INIT_MASK 0x80
#define INT_MASK_LOL_B_MASK 0x40
#define INT_MASK_LOL_A_MASK 0x20
#define INT_MASK_LOS_CLKIN_MASK 0x10
#define INT_MASK_LOS_XTAL_MASK 0x08
/*
* This section contains data structures for configuring the
* oscillator, VCXO and CLKIN section.
*/
#define REG_XTAL_CL 183
#define XTAL_CL_MASK 0xC0
#define PLL_CL_MASK 0x36
//this sets the crystal load capacitance
typedef enum
{
XTAL_Load_4_pF = 0x00,
XTAL_Load_6_pF = 0x40,
XTAL_Load_8_pF = 0x80,
XTAL_Load_10_pF = 0xC0
} Si5351_XTALLoadTypeDef;
//The following is an unexplained parameter. However someone from SiLabs called it "VCO load cap".
//Lower settings seem to be more stable on higher frequencies, higher settings are more stable on lower frequencies allowing to tune the PLL to <200 MHz.
typedef enum
{
PLL_Capacitive_Load_0 = 0,
PLL_Capacitive_Load_1 = 1,
PLL_Capacitive_Load_2 = 2
} Si5351_PLLCapacitiveLoadTypeDef;
#define REG_CLKIN_DIV 15
#define CLKIN_MASK 0xC0
//this sets the CLKIN pre-divider, after division, CLKIN should
//fall between 10-40 MHz
typedef enum
{
CLKINDiv_Div1 = 0x00,
CLKINDiv_Div2 = 0x40,
CLKINDiv_Div4 = 0x80,
CLKINDiv_Div8 = 0xC0
} Si5351_CLKINDivTypeDef;
#define REG_FANOUT_EN 187
#define FANOUT_CLKIN_EN_MASK 0x80
#define FANOUT_XO_EN_MASK 0x40
#define FANOUT_MS_EN_MASK 0x10
#define REG_VCXO_PARAM_0_7 162
#define REG_VCXO_PARAM_8_15 163
#define REG_VCXO_PARAM_16_21 164
#define VCXO_PARAM_16_21_MASK 0x3F
#define VCXO_PARAM_MASK 0x003FFFFF
#define APR_MINIMUM 30 //minimum pull range
#define APR_MAXIMUM 240 //maximum pull range
#define CLKIN_MINIMUM 10000 //minimum CLKIN frequency after division in kHz
#define CLKIN_MAXIMUM 40000 //maximum CLKIN frequency after division in kHz
typedef struct
{
Si5351_XTALLoadTypeDef OSC_XTAL_Load; //capacitive load of XTAL, 10pF by default
Si5351_CLKINDivTypeDef CLKIN_Div; //CLKIN predivision, input f to PLL must be 10-40 MHz
uint8_t VCXO_Pull_Range_ppm; //can range from +-30 ppm to 240ppm
} Si5351_OSCConfigTypeDef;
/*
* This section contains data structures for configuring the
* PLL (PLLA and PLLB)
*/
#define REG_PLL_CLOCK_SOURCE 15
#define PLLA_CLOCK_SOURCE_MASK 0x04
#define PLLB_CLOCK_SOURCE_MASK 0x08
//this selects the clock source for the PLL
typedef enum
{
PLL_Clock_Source_XTAL = 0x00,
PLL_Clock_Source_CLKIN = 0x0C //0x04 for PLLA, 0x08 for PLLB, use mask!
} Si5351_PLLClockSourceTypeDef;
#define REG_FB_INT 22
#define FB_INT_MASK 0x40
#define REG_PLL_RESET 177
#define PLLA_RESET_MASK 0x20
#define PLLB_RESET_MASK 0x80
#define REG_MSN_P1_0_7 30
#define REG_MSN_P1_8_15 29
#define REG_MSN_P1_16_17 28
#define MSN_P1_16_17_MASK 0x03
#define REG_MSN_P2_0_7 33
#define REG_MSN_P2_8_15 32
#define REG_MSN_P2_16_19 31
#define MSN_P2_16_19_MASK 0x0F
#define REG_MSN_P3_0_7 27
#define REG_MSN_P3_8_15 26
#define REG_MSN_P3_16_19 31
#define MSN_P3_16_19_MASK 0xF0
#define MSNA_MSNB_OFFSET 8
typedef struct
{
uint32_t PLL_Multiplier_Integer;
uint32_t PLL_Multiplier_Numerator;
uint32_t PLL_Multiplier_Denominator;
Si5351_PLLClockSourceTypeDef PLL_Clock_Source;
Si5351_PLLCapacitiveLoadTypeDef PLL_Capacitive_Load;
} Si5351_PLLConfigTypeDef;
/*
* This section contains data structures for configuring the
* Spread Spectrum feature.
*/
#define REG_SSC_MODE 151
#define SSC_MODE_MASK 0x80
//this selects the Spread Spectrum mode
typedef enum
{
SS_Mode_DownSpread = 0x00,
SS_Mode_CenterSpread = 0x80
} Si5351_SSModeTypeDef;
typedef enum
{
SS_NCLK_0 = 0x00,
SS_NCLK_1 = 0x10,
SS_NCLK_2 = 0x20,
SS_NCLK_3 = 0x30,
SS_NCLK_4 = 0x40,
SS_NCLK_5 = 0x50,
SS_NCLK_6 = 0x60,
SS_NCLK_7 = 0x70,
SS_NCLK_8 = 0x80,
SS_NCLK_9 = 0x90,
SS_NCLK_10 = 0xA0,
SS_NCLK_11 = 0xB0,
SS_NCLK_12 = 0xC0,
SS_NCLK_13 = 0xD0,
SS_NCLK_14 = 0xE0,
SS_NCLK_15 = 0xF0
} Si5351_SSNCLKTypeDef;
#define REG_SSDN_P1_0_7 153
#define REG_SSDN_P1_8_11 154
#define SSDN_P1_8_11_MASK 0x0F
#define REG_SSDN_P2_0_7 150
#define REG_SSDN_P2_8_14 149
#define SSDN_P2_8_14_MASK 0x7F
#define REG_SSDN_P3_0_7 152
#define REG_SSDN_P3_8_14 151
#define SSDN_P3_8_14_MASK 0x7F
#define REG_SSUDP_0_7 155
#define REG_SSUDP_8_11 154
#define SSUDP_8_11_MASK 0xF0
#define REG_SSUP_P1_0_7 160
#define REG_SSUP_P1_8_11 161
#define SSUP_P1_8_11_MASK 0x0F
#define REG_SSUP_P2_0_7 157
#define REG_SSUP_P2_8_14 156
#define SSUP_P2_8_14_MASK 0x7F
#define REG_SSUP_P3_0_7 159
#define REG_SSUP_P3_8_14 158
#define SSUP_P3_8_14_MASK 0x7F
#define REG_SSC_EN 149
#define SSC_EN_MASK 0x80
#define REG_SS_NCLK 161
#define SS_NCLK_MASK 0xF0
typedef struct
{
uint32_t SS_Amplitude_ppm; //amplitude of the SS feature in ppm of center frequency
EnableState SS_Enable;
Si5351_SSModeTypeDef SS_Mode;
Si5351_SSNCLKTypeDef SS_NCLK;
} Si5351_SSConfigTypeDef;
/*
* This section contains data structures for configuring the
* Output Multisynth.
*/
//this selects the Multisynth clock source
typedef enum
{
MS_Clock_Source_PLLA = 0x00,
MS_Clock_Source_PLLB = 0x20
} Si5351_MSClockSourceTypeDef;
#define REG_MS_P1_0_7 46
#define REG_MS_P1_8_15 45
#define REG_MS_P1_16_17 44
#define MS_P1_16_17_MASK 0x03
#define REG_MS_P2_0_7 49
#define REG_MS_P2_8_15 48
#define REG_MS_P2_16_19 47
#define MS_P2_16_19_MASK 0x0F
#define REG_MS_P3_0_7 43
#define REG_MS_P3_8_15 42
#define REG_MS_P3_16_19 47
#define MS_P3_16_19_MASK 0xF0
#define REG_MS67_P1 90
#define REG_MS_INT 16
#define MS_INT_MASK 0x40
#define REG_MS_DIVBY4 44
#define MS_DIVBY4_MASK 0x0C
#define REG_MS_SRC 16
#define MS_SRC_MASK 0x20
#define MS_SETUP_STEP 1
#define MS_DIVIDER_STEP 8
typedef struct
{
Si5351_MSClockSourceTypeDef MS_Clock_Source; //select source on MS input
uint32_t MS_Divider_Integer; //the integer part of divider, called "a"
uint32_t MS_Divider_Numerator; //the numerator, called "b"
uint32_t MS_Divider_Denominator; //the denominator, called "c"
} Si5351_MSConfigTypeDef; //sets MS divider ( a+(b/c) ) and clock (PLLA/PLLB)
/*
* This section contains data structures for configuring the
* CLK, R divider and output stage (joined together because they make
* a tight block without any multiplexer).
*/
#define REG_CLK_SRC 16
#define CLK_SRC_MASK 0x0C
//this sets the CLK source clock
typedef enum
{
CLK_Clock_Source_XTAL = 0x00,
CLK_Clock_Source_CLKIN = 0x04,
CLK_Clock_Source_MS0_MS4 = 0x08, //this uses MS0 for CLK0..3 and MS4 for CLK4..7
CLK_Clock_Source_MS_Own = 0x0C //this uses MSx for CLKx
} Si5351_CLKClockSourceTypeDef; //configures multiplexer on CLK input
#define REG_CLK_R_DIV 44
#define CLK_R_DIV_MASK 0x70
#define REG_CLK_R67_DIV 92
#define CLK_R67_DIV_MASK 0x07
//this sets the R divider ratio
typedef enum
{
CLK_R_Div1 = 0x00,
CLK_R_Div2 = 0x10,
CLK_R_Div4 = 0x20,
CLK_R_Div8 = 0x30,
CLK_R_Div16 = 0x40,
CLK_R_Div32 = 0x50,
CLK_R_Div64 = 0x60,
CLK_R_Div128 = 0x70
} Si5351_CLKRDivTypeDef;
#define REG_CLK_DIS_STATE 24
#define CLK_DIS_STATE_MASK 0x03
//this sets output buffer behaviour when disabled
typedef enum
{
CLK_Disable_State_LOW = 0x00,
CLK_Disable_State_HIGH = 0x01,
CLK_Disable_State_HIGH_Z = 0x02, //three-stated when off
CLK_Disable_State_ALWAYS_ON = 0x03 //cannot be disabled
} Si5351_CLKDisableStateTypeDef;
#define REG_CLK_IDRV 16
#define CLK_IDRV_MASK 0x03
//this sets current drive of the output buffer
typedef enum
{
CLK_I_Drv_2mA = 0x00,
CLK_I_Drv_4mA = 0x01,
CLK_I_Drv_6mA = 0x02,
CLK_I_Drv_8mA = 0x03
} Si5351_CLKIDrvTypeDef;
#define REG_CLK_PHOFF 165
#define CLK_PHOFF_MASK 0x7F
#define REG_CLK_EN 3
#define REG_CLK_INV 16
#define CLK_INV_MASK 0x10
#define REG_CLK_PDN 16
#define CLK_PDN_MASK 0x80
#define REG_CLK_OEB 9
#define CLK_PHOFF_STEP 1
#define CLK_SETUP_STEP 1
#define CLK_R_DIV_STEP 8
typedef struct
{
Si5351_CLKClockSourceTypeDef CLK_Clock_Source; //clock source
/* this sets the time offset of the CLK channel, basic unit
* is one quarter of the VCO period (90deg offset),
* set it to 4*fVCO*toffset, the value is 7-bit, the max time offset
* varies between 35 and 53 ns (1 cycle for 28 and 19 MHz, respectively)
* according to the current frequency of the VCO
*/
uint8_t CLK_QuarterPeriod_Offset;
Si5351_CLKRDivTypeDef CLK_R_Div; //R divider value (only powers of 2)
EnableState CLK_Invert; //invert output clock
EnableState CLK_Enable; //enable flag
EnableState CLK_PowerDown; //powerdown flag
Si5351_CLKDisableStateTypeDef CLK_Disable_State; //sets output behaviour when disabled
Si5351_CLKIDrvTypeDef CLK_I_Drv; //output driver current drive strength
EnableState CLK_Use_OEB_Pin; //allows using OEB pin to enable clock
} Si5351_CLKConfigTypeDef;
/*
* This section contains main data structure for Si5351 configuration
*/
typedef struct
{
/*
* These are frequencies of the input clocks, set it in Hz.
*/
uint32_t f_XTAL;
uint32_t f_CLKIN;
//Interrupt masking - enabling it disables the int source from pulling INTR low
EnableState Interrupt_Mask_SysInit;
EnableState Interrupt_Mask_PLLB;
EnableState Interrupt_Mask_PLLA;
EnableState Interrupt_Mask_CLKIN;
EnableState Interrupt_Mask_XTAL;
//Fanout enable - enables internal clock routing
EnableState Fanout_MS_EN;
EnableState Fanout_XO_EN;
EnableState Fanout_CLKIN_EN;
I2C_TypeDef *I2Cx; //the I2C interface that will be used
uint8_t HW_I2C_Address; //I2C address of the Si5351 for the packages with A0 pin
//(also, some duds with strange address reported)
Si5351_OSCConfigTypeDef OSC; //Oscillator, CLKIN and VCXO settings
Si5351_PLLConfigTypeDef PLL[2]; //PLL settings for PLLA and PLLB
Si5351_MSConfigTypeDef MS[8]; //MultiSynth[0..7] settings
Si5351_CLKConfigTypeDef CLK[8]; //CLK[0..7], R divider and output stage settings
Si5351_SSConfigTypeDef SS; //spread spectrum settings
} Si5351_ConfigTypeDef;
/*
* Typedefs for selecting PLL, MS and CLK to be used
*/
//this selects PLL channel
typedef enum
{
PLL_A = 0,
PLL_B = 1
} Si5351_PLLChannelTypeDef;
//this selects Multisynth channel
typedef enum
{
MS0 = 0,
MS1 = 1,
MS2 = 2,
MS3 = 3,
MS4 = 4,
MS5 = 5,
MS6 = 6,
MS7 = 7
} Si5351_MSChannelTypeDef;
//this selects CLK channel
typedef enum
{
CLK0 = 0,
CLK1 = 1,
CLK2 = 2,
CLK3 = 3,
CLK4 = 4,
CLK5 = 5,
CLK6 = 6,
CLK7 = 7
} Si5351_CLKChannelTypeDef;
//this selects device status flag
typedef enum
{
StatusBit_SysInit = DEV_SYS_INIT_MASK,
StatusBit_PLLA = DEV_STKY_LOL_A_MASK,
StatusBit_PLLB = DEV_LOL_B_MASK,
StatusBit_CLKIN = DEV_LOS_CLKIN_MASK,
StatusBit_XTAL = DEV_LOS_XTAL_MASK,
} Si5351_StatusBitTypeDef;
//these write to and read from a Si5351 register, for porting
//purposes, these functions should be the only ones which should need edits
int Si5351_WriteRegister(Si5351_ConfigTypeDef *Si5351_ConfigStruct, uint8_t reg_address, uint8_t reg_data);
uint8_t Si5351_ReadRegister(Si5351_ConfigTypeDef *Si5351_ConfigStruct, uint8_t reg_address);
void Si5351_StructInit(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
void Si5351_OSCConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
EnableState Si5351_CheckStatusBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
EnableState Si5351_CheckStickyBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
void Si5351_InterruptConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
void Si5351_ClearStickyBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
void Si5351_PLLConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_PLLChannelTypeDef PLL_Channel);
void Si5351_PLLReset(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_PLLChannelTypeDef PLL_Channel);
void Si5351_PLLSimultaneousReset(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
void Si5351_SSConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
void Si5351_MSConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_MSChannelTypeDef MS_Channel);
void Si5351_CLKPowerCmd(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_CLKChannelTypeDef CLK_Channel);
void Si5351_CLKConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_CLKChannelTypeDef CLK_Channel);
int Si5351_Init(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
#endif /* SI5351_H_ */

19
Core/Inc/stm32_si5351_reg.h
View File

@ -60,6 +60,7 @@
#define SI5351_PLLA_SRC (1u<<2) /* Input Source Select for PLLA. */ #define SI5351_PLLA_SRC (1u<<2) /* Input Source Select for PLLA. */
#define SI5351_PLL_INPUT_SOURCE_RESET_VALUE 0x00 #define SI5351_PLL_INPUT_SOURCE_RESET_VALUE 0x00
/* CLK0 Control */
#define SI5351_CLK0_CONTROL 16u /* R/W */ #define SI5351_CLK0_CONTROL 16u /* R/W */
#define SI5351_CLK0_PDN (1u<<7) /* Clock 0 Power Down. */ #define SI5351_CLK0_PDN (1u<<7) /* Clock 0 Power Down. */
#define SI5351_MS0_INT (1u<<6) /* MultiSynth 0 Integer Mode. 1..MS0 operates in integer mode. */ #define SI5351_MS0_INT (1u<<6) /* MultiSynth 0 Integer Mode. 1..MS0 operates in integer mode. */
@ -70,8 +71,8 @@
#define SI5351_CLK0_SRC (3u<<2) /* and connects CLK0 directly to the oscillator which generates an output freq determined by the XTAL freq. */ #define SI5351_CLK0_SRC (3u<<2) /* and connects CLK0 directly to the oscillator which generates an output freq determined by the XTAL freq. */
#define SI5351_CLK_SRC_XTAL (0x00<<2) /*!< Select the XTAL as the clock source for CLKx */ #define SI5351_CLK_SRC_XTAL (0x00<<2) /*!< Select the XTAL as the clock source for CLKx */
#define SI5351_CLK_SRC_CLKIN (0x01<<2) /*!< Select the CLKIN as the clock source for CLKx */ #define SI5351_CLK_SRC_CLKIN (0x01<<2) /*!< Select the CLKIN as the clock source for CLKx */
#define SI5351_CLK_SRC_MS0 (0x02<<2) /*!< Select the MulitSynth 0 as the clock source for CLKx */ #define SI5351_CLK_SRC_RESERVED (0x02<<2) /*!< DO NOT Select this option */
#define SI5351_CLK_SRC_MS1 (0x03<<2) /*!< Select the MulitSynth 1 as the clock source for CLKx */ #define SI5351_CLK_SRC_MS0 (0x03<<2) /*!< Select the MulitSynth 0 as the clock source for CLKx */
#define SI5351_CLK0_IDRV_1 (1u<<1) /* 01: CLKIN as clock source for CLK0. By-pass both synthesis stages. 10: N/A. 11: Select MultiSynth 0 as source for CLK0 */ #define SI5351_CLK0_IDRV_1 (1u<<1) /* 01: CLKIN as clock source for CLK0. By-pass both synthesis stages. 10: N/A. 11: Select MultiSynth 0 as source for CLK0 */
#define SI5351_CLK0_IDRV_0 (1u<<0) /* CLK0 Output Rise and Fall time / Drive Strength Control */ #define SI5351_CLK0_IDRV_0 (1u<<0) /* CLK0 Output Rise and Fall time / Drive Strength Control */
#define SI5351_CLK0_IDRV (3u<<0) /* 00: 2 mA, 01: 4 mA, 10: 6 mA, 11: 8 mA */ #define SI5351_CLK0_IDRV (3u<<0) /* 00: 2 mA, 01: 4 mA, 10: 6 mA, 11: 8 mA */
@ -1081,6 +1082,7 @@ even integers greater than or equal to 6. All other divide values are invalid. *
#define SI5351_PLLB_RST (1u<<7) /*!< PLLB_Reset, writing a 1 to this bit will reset PLLB. This is a self clearing bit */ #define SI5351_PLLB_RST (1u<<7) /*!< PLLB_Reset, writing a 1 to this bit will reset PLLB. This is a self clearing bit */
#define SI5351_PLLA_RST (1u<<5) /*!< PLLA_Reset, writing a 1 to this bit will reset PLLA. This is a self clearing bit */ #define SI5351_PLLA_RST (1u<<5) /*!< PLLA_Reset, writing a 1 to this bit will reset PLLA. This is a self clearing bit */
#define SI5351_PLL_RESET_RESERVED (0x5F) /*!< leave as default, not specified */ #define SI5351_PLL_RESET_RESERVED (0x5F) /*!< leave as default, not specified */
#define SI5351_PLL_RESET_VALUE (0xAC) /*!< according to SI5351 datasheet Figure 10, page 21, applying PLLA, PLLB soft reset */
/* Crystal Internal Load Capacitance /* Crystal Internal Load Capacitance
* Two bits determine the internal load capacitance value for the crystal. See the Crystal * Two bits determine the internal load capacitance value for the crystal. See the Crystal
@ -1092,7 +1094,18 @@ even integers greater than or equal to 6. All other divide values are invalid. *
#define SI5351_XTAL_CL_8_PF (2u<<6) /*!< Internal CL = 8 pF */ #define SI5351_XTAL_CL_8_PF (2u<<6) /*!< Internal CL = 8 pF */
#define SI5351_XTAL_CL_10_PF (3u<<6) /*!< Internal CL = 10 pF */ #define SI5351_XTAL_CL_10_PF (3u<<6) /*!< Internal CL = 10 pF */
#define SI5351_XTAL_CL_MASK (3u<<6) /*!< Mask of the load capacitance */ #define SI5351_XTAL_CL_MASK (3u<<6) /*!< Mask of the load capacitance */
#define SI5351_XTAL_RESERVED (0x13) /*!< RESERVED bit[5:0] should be written! */ #define SI5351_XTAL_RESERVED (0x13) /*!< RESERVED bit[5:0] should be written! (0b010010) */
/* There is some mystery about the value of these bits [5:0], in AN619 version 0.6, there are two values
* miscellaneous PLL parameters PLLA_CL and PLLB_CL which should be set each of them to 2,
* that could possibly be bits [5:4] and [2:1] ?
* Reg183 contains suspicious bits which are rather unexplained on page 60, where there is stated that reg183, bits [5:0] should
* be set to 010010b. Maybe it sets speed of the PLL loop?
* After a bit of experimentation, it seems to be like this: Bit [0]: does nothing; Bits [2:1]: Setting one of these bits causes
* the PLLA to become unstable.
* Setting both of them also causes the SysInit and PLLB to be stuck in failure for a long time, then they start. It seems that
* these bits allow you to tune the PLL to <200 MHz. Bit [3]: does nothing; Bits [5:4]: The same as [2:1], but for PLLB.
*/
/* Fanout Enable, set these bits to 1 for each fanout /* Fanout Enable, set these bits to 1 for each fanout
* note: the reset value of this SI5351 register is 0x00 */ * note: the reset value of this SI5351 register is 0x00 */

4
Core/Inc/stm32l4xx_hal_conf.h
View File

@ -68,7 +68,7 @@
/*#define HAL_QSPI_MODULE_ENABLED */ /*#define HAL_QSPI_MODULE_ENABLED */
/*#define HAL_QSPI_MODULE_ENABLED */ /*#define HAL_QSPI_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */ /*#define HAL_RNG_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */ #define HAL_RTC_MODULE_ENABLED
/*#define HAL_SAI_MODULE_ENABLED */ /*#define HAL_SAI_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */ /*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */ /*#define HAL_SMBUS_MODULE_ENABLED */
@ -152,7 +152,7 @@
#endif /* LSE_VALUE */ #endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT) #if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ #define LSE_STARTUP_TIMEOUT 50000U /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */ #endif /* HSE_STARTUP_TIMEOUT */
/** /**

2
Core/Inc/stm32l4xx_it.h
View File

@ -52,7 +52,7 @@ void MemManage_Handler(void);
void BusFault_Handler(void); void BusFault_Handler(void);
void UsageFault_Handler(void); void UsageFault_Handler(void);
void DebugMon_Handler(void); void DebugMon_Handler(void);
void TIM1_UP_TIM16_IRQHandler(void); void TIM6_DAC_IRQHandler(void);
void LPUART1_IRQHandler(void); void LPUART1_IRQHandler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */

404
Core/Src/main.c
View File

@ -46,6 +46,8 @@
UART_HandleTypeDef hlpuart1; UART_HandleTypeDef hlpuart1;
RTC_HandleTypeDef hrtc;
PCD_HandleTypeDef hpcd_USB_OTG_FS; PCD_HandleTypeDef hpcd_USB_OTG_FS;
/* Definitions for defaultTask */ /* Definitions for defaultTask */
@ -62,12 +64,29 @@ const osThreadAttr_t terminalTask_attributes = {
.stack_size = 128 * 4, .stack_size = 128 * 4,
.priority = (osPriority_t) osPriorityBelowNormal, .priority = (osPriority_t) osPriorityBelowNormal,
}; };
/* Definitions for idTask */ /* Definitions for morseTask */
osThreadId_t idTaskHandle; osThreadId_t morseTaskHandle;
const osThreadAttr_t idTask_attributes = { const osThreadAttr_t morseTask_attributes = {
.name = "idTask", .name = "morseTask",
.stack_size = 128 * 4, .stack_size = 128 * 4,
.priority = (osPriority_t) osPriorityLow, .priority = (osPriority_t) osPriorityNormal,
};
/* Definitions for clk2Task */
osThreadId_t clk2TaskHandle;
const osThreadAttr_t clk2Task_attributes = {
.name = "clk2Task",
.stack_size = 128 * 4,
.priority = (osPriority_t) osPriorityHigh,
};
/* Definitions for morseQueue */
osMessageQueueId_t morseQueueHandle;
const osMessageQueueAttr_t morseQueue_attributes = {
.name = "morseQueue"
};
/* Definitions for data_access */
osSemaphoreId_t data_accessHandle;
const osSemaphoreAttr_t data_access_attributes = {
.name = "data_access"
}; };
/* USER CODE BEGIN PV */ /* USER CODE BEGIN PV */
@ -79,9 +98,11 @@ static void MX_GPIO_Init(void);
static void MX_LPUART1_UART_Init(void); static void MX_LPUART1_UART_Init(void);
static void MX_USB_OTG_FS_PCD_Init(void); static void MX_USB_OTG_FS_PCD_Init(void);
static void MX_I2C1_Init(void); static void MX_I2C1_Init(void);
static void MX_RTC_Init(void);
void StartDefaultTask(void *argument); void StartDefaultTask(void *argument);
void start_terminal_task(void *argument); void start_terminal_task(void *argument);
void start_id_task(void *argument); void start_morse_task(void *argument);
void start_clk2_task(void *argument);
/* USER CODE BEGIN PFP */ /* USER CODE BEGIN PFP */
// redirect the output of the printf function to the USART print function // redirect the output of the printf function to the USART print function
@ -125,16 +146,20 @@ int main(void)
MX_LPUART1_UART_Init(); MX_LPUART1_UART_Init();
MX_USB_OTG_FS_PCD_Init(); MX_USB_OTG_FS_PCD_Init();
MX_I2C1_Init(); MX_I2C1_Init();
MX_RTC_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
si5351_inst_t instance_si5351[3] = {0}; si5351_inst_t instance_si5351[3] = {0};
si5351_inst_t si5351_inst;
// 1st SI5351 chip and with an A0 = 0: // 1st SI5351 chip and with an A0 = 0:
instance_si5351[0] = si5351_init(&hi2c1, 27000000, 0x61); /*instance_si5351[0] = si5351_init(&hi2c1, 27000000, 0x61, 0);*/
// 2nd SI5351 chip on the same I2C bus "hi2c1" but address line A0 = 1 // 2nd SI5351 chip on the same I2C bus "hi2c1" but address line A0 = 1
instance_si5351[1] = si5351_init(&hi2c1, 27000000, 0x60); instance_si5351[1] = si5351_init(&hi2c1, 25000000, 0x60, 3 * sizeof(uint32_t));
// 3rd SI5351 chip on another IC2 bus with handle "hi2c2" *\/ // 3rd SI5351 chip on another IC2 bus with handle "hi2c2" *\/
instance_si5351[2] = si5351_init(&hi2c1, 25000000, 0x60); instance_si5351[2] = si5351_init(&hi2c1, 25000000, 0x60, 0);
si5351_inst = instance_si5351[1];
for (int i=0; i<3 ;i++) { for (int i=0; i<3 ;i++) {
int ready; int ready;
@ -149,13 +174,44 @@ int main(void)
puts(si5351_read_register_debug(instance_si5351[1], buf, sizeof(buf), i)); puts(si5351_read_register_debug(instance_si5351[1], buf, sizeof(buf), i));
} }
status = si5351_program(instance_si5351[1]); // status = si5351_program(instance_si5351[1]);
printf("Device #1 gets status %d\n", status); printf("Device #1 gets status %d\n", status);
printf("Debug:\n%s", si5351_read_debug_msg(instance_si5351[1])); printf("Debug:\n%s", si5351_read_debug_msg(instance_si5351[1]));
//si5351_set_clk0(instance_si5351[1], 3579545);
// si5351_set_clk0(instance_si5351[1], 3580000);
// si5351_set_clk0(instance_si5351[1], 4000000);
si5351_set_clk0(instance_si5351[1], 3510000);
si5351_enable_output(instance_si5351[1],0);
HAL_Delay(1000);
si5351_set_clk0(instance_si5351[1], 6055000);
si5351_enable_output(instance_si5351[1],0);
HAL_Delay(1000);
si5351_set_clk0(instance_si5351[1], 99900000);
si5351_enable_output(instance_si5351[1],0);
HAL_Delay(5000);
si5351_set_clk0(instance_si5351[1], 144500000);
si5351_enable_output(instance_si5351[1],0);
HAL_Delay(10000);
/* World Youth ARDF Championship Romania 2022 */
/* 80 m . RF power 3 W, QRG MOE-MO5: 3550 MHz, MO: 3600 MHz, Antenna 8m
* 80 m Sprint pwr 1 W, TX 1-5: MOE-MO5: 3530 MHz, S: 3550 MHz, TX 1F-5F MOE-MO5: 3570 MHz
* MO: 3600 MHz, Antenna: 8m
* 2 m RF power 1 W, MOE-MO5: 144.500, MO: 144.900 MHz, crossed dipole
*/
si5351_set_clk0(si5351_inst, 3550000);
si5351_set_clk(si5351_inst, 3570000, 2, SI5351_PLLB);
si5351_enable_output(NULL,2);
/*
for (int i=2; i>=0; i--) { for (int i=2; i>=0; i--) {
si5351_deinit(instance_si5351[i]); si5351_deinit(instance_si5351[i]);
} }
*/
/* USER CODE END 2 */ /* USER CODE END 2 */
/* Init scheduler */ /* Init scheduler */
@ -165,6 +221,10 @@ int main(void)
/* add mutexes, ... */ /* add mutexes, ... */
/* USER CODE END RTOS_MUTEX */ /* USER CODE END RTOS_MUTEX */
/* Create the semaphores(s) */
/* creation of data_access */
data_accessHandle = osSemaphoreNew(1, 1, &data_access_attributes);
/* USER CODE BEGIN RTOS_SEMAPHORES */ /* USER CODE BEGIN RTOS_SEMAPHORES */
/* add semaphores, ... */ /* add semaphores, ... */
/* USER CODE END RTOS_SEMAPHORES */ /* USER CODE END RTOS_SEMAPHORES */
@ -173,6 +233,10 @@ int main(void)
/* start timers, add new ones, ... */ /* start timers, add new ones, ... */
/* USER CODE END RTOS_TIMERS */ /* USER CODE END RTOS_TIMERS */
/* Create the queue(s) */
/* creation of morseQueue */
morseQueueHandle = osMessageQueueNew (16, sizeof(uint16_t), &morseQueue_attributes);
/* USER CODE BEGIN RTOS_QUEUES */ /* USER CODE BEGIN RTOS_QUEUES */
/* add queues, ... */ /* add queues, ... */
/* USER CODE END RTOS_QUEUES */ /* USER CODE END RTOS_QUEUES */
@ -184,8 +248,11 @@ int main(void)
/* creation of terminalTask */ /* creation of terminalTask */
terminalTaskHandle = osThreadNew(start_terminal_task, NULL, &terminalTask_attributes); terminalTaskHandle = osThreadNew(start_terminal_task, NULL, &terminalTask_attributes);
/* creation of idTask */ /* creation of morseTask */
// idTaskHandle = osThreadNew(start_id_task, NULL, &idTask_attributes); morseTaskHandle = osThreadNew(start_morse_task, (void*) si5351_inst, &morseTask_attributes);
/* creation of clk2Task */
clk2TaskHandle = osThreadNew(start_clk2_task, (void*) si5351_inst, &clk2Task_attributes);
/* USER CODE BEGIN RTOS_THREADS */ /* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */ /* add threads, ... */
@ -230,13 +297,15 @@ void SystemClock_Config(void)
/** Configure LSE Drive Capability /** Configure LSE Drive Capability
*/ */
HAL_PWR_EnableBkUpAccess(); HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_HIGH);
/** Initializes the RCC Oscillators according to the specified parameters /** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure. * in the RCC_OscInitTypeDef structure.
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE
|RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.MSIState = RCC_MSI_ON; RCC_OscInitStruct.MSIState = RCC_MSI_ON;
RCC_OscInitStruct.MSICalibrationValue = 0; RCC_OscInitStruct.MSICalibrationValue = 0;
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
@ -265,6 +334,7 @@ void SystemClock_Config(void)
{ {
Error_Handler(); Error_Handler();
} }
HAL_RCCEx_EnableLSCO(RCC_LSCOSOURCE_LSI);
/** Enable MSI Auto calibration /** Enable MSI Auto calibration
*/ */
@ -353,6 +423,70 @@ static void MX_LPUART1_UART_Init(void)
} }
/**
* @brief RTC Initialization Function
* @param None
* @retval None
*/
static void MX_RTC_Init(void)
{
/* USER CODE BEGIN RTC_Init 0 */
/* USER CODE END RTC_Init 0 */
RTC_TimeTypeDef sTime = {0};
RTC_DateTypeDef sDate = {0};
/* USER CODE BEGIN RTC_Init 1 */
/* USER CODE END RTC_Init 1 */
/** Initialize RTC Only
*/
hrtc.Instance = RTC;
hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
hrtc.Init.AsynchPrediv = 127;
hrtc.Init.SynchPrediv = 255;
hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
if (HAL_RTC_Init(&hrtc) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN Check_RTC_BKUP */
/* USER CODE END Check_RTC_BKUP */
/** Initialize RTC and set the Time and Date
*/
sTime.Hours = 0x12;
sTime.Minutes = 0x30;
sTime.Seconds = 0x0;
sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
sTime.StoreOperation = RTC_STOREOPERATION_RESET;
if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
{
Error_Handler();
}
sDate.WeekDay = RTC_WEEKDAY_MONDAY;
sDate.Month = RTC_MONTH_MAY;
sDate.Date = 0x23;
sDate.Year = 0x22;
if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN RTC_Init 2 */
/* USER CODE END RTC_Init 2 */
}
/** /**
* @brief USB_OTG_FS Initialization Function * @brief USB_OTG_FS Initialization Function
* @param None * @param None
@ -429,11 +563,17 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/*Configure GPIO pin : B1_Pin */ /*Configure GPIO pins : PC13 PC0 PC1 PC2
GPIO_InitStruct.Pin = B1_Pin; PC3 PC4 PC5 PC6
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; PC8 PC9 PC10 PC11
PC12 */
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2
|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6
|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pins : PF0 PF1 PF2 PF3 /*Configure GPIO pins : PF0 PF1 PF2 PF3
PF4 PF5 PF6 PF7 PF4 PF5 PF6 PF7
@ -453,16 +593,6 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
/*Configure GPIO pins : PC0 PC1 PC2 PC3
PC4 PC5 PC6 PC8
PC9 PC10 PC11 PC12 */
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_8
|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pins : PA0 PA1 PA2 PA3 /*Configure GPIO pins : PA0 PA1 PA2 PA3
PA4 PA5 PA6 PA7 PA4 PA5 PA6 PA7
PA15 */ PA15 */
@ -548,6 +678,91 @@ PUTCHAR_PROTOTYPE
return ch; return ch;
} }
void make_di_dah(si5351_inst_t inst, uint8_t clk, unsigned int dah, uint32_t delay) {
/* inner function, no need to check inst */
if(!delay)
return;
HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_SET);
(void) si5351_enable_output(inst, clk);
osDelay(dah ? 3*delay : delay); // dit: 1 unit; dah 3 units length
HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET);
(void) si5351_disable_output(inst, clk);
osDelay(delay); // one unit of inter character space (gap b/w dits and dahs within a character)
}
void morse(si5351_inst_t inst, uint8_t clk, char * s) {
const uint8_t mcode[] = {0x0d,0x57,0x77,0x17,0x01,0x75,0x1f,0x55,0x05,0xfd,
0x37,0x5d,0x0f,0x07,0x3f,0x7d,0xdf,0x1d,0x15,0x03,
0x35,0xd5,0x3d,0xd7,0xf7,0x5f,
0xf0,0xe0,0xc0,0x80,0x00,0x08,0x18,0x38,0x78,0xF8,
0xAA};
uint32_t delay[3];
uint8_t ch;
if(clk >= 3)
return;
osSemaphoreAcquire(data_accessHandle,osWaitForever);
(void) si5351_read_data(inst, delay);
osSemaphoreRelease(data_accessHandle);
while ((ch = *s++)) {
/* ascii code: numbers b/w 0x30 - 0x39 chars b/w 0x41 - 0x5A and 0x61 - 0x7A */
if ((ch > 0x40 && ch < 0x5B) || (ch > 0x60 && ch < 0x7A)) {
ch &= 0xDF; // make uppercase
ch -= 0x41; // index 0 for 'A'
} else if (ch > 0x2F && ch < 0x3A) {
ch -= 49-26;
}
if (ch != 0x20 && ch < sizeof(mcode)) { //when space add an additional pause (do nothing)
switch(ch) {
case '.': ch = 0x37;
break;
default:
ch = mcode[ch]; //from the given array morse code
}
if (ch & 0x01) { // character coding
for (int i=4; i>0; i--) {
switch ((ch & 0x03)) {
case 0: /* the end */
i = 0;
break;
case 1: /* did */
make_di_dah(inst, clk, 0, delay[clk]);
break;
case 3: /* dah */
make_di_dah(inst, clk, 1, delay[clk]);
break;
case 2: /* failure */
default:
i = -1;
break;
}
ch >>= 2;
}
} else if ((ch & 0x07) == 0) { // number coding
ch >>= 3;
for (int i= 5; i>0; i--) {
make_di_dah(inst, clk, ch & 0x01, delay[clk]);
ch >>= 1;
}
} else if ((ch & 0x03) == 2) { // special characters
ch >>= 2;
for (int i=6; i>0; i--) {
make_di_dah(inst, clk, ch & 0x01, delay[clk]);
ch >>= 1;
}
}
}
osDelay(3 * delay[clk]); //word inter character space (gap b/w the characters of a word) 3 units
}
}
/* USER CODE END 4 */ /* USER CODE END 4 */
/* USER CODE BEGIN Header_StartDefaultTask */ /* USER CODE BEGIN Header_StartDefaultTask */
@ -559,17 +774,17 @@ PUTCHAR_PROTOTYPE
/* USER CODE END Header_StartDefaultTask */ /* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument) void StartDefaultTask(void *argument)
{ {
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
(void) argument; //unused argument (void) argument; //unused argument
/* Infinite loop */ /* Infinite loop */
for(;;) { for(;;) {
// HAL_GPIO_TogglePin(LD1_GPIO_Port, LD1_Pin); // HAL_GPIO_TogglePin(LD1_GPIO_Port, LD1_Pin);
HAL_GPIO_WritePin(LD1_GPIO_Port, LD1_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(LD1_GPIO_Port, LD1_Pin, GPIO_PIN_SET);
osDelay(1); osDelay(10);
HAL_GPIO_WritePin(LD1_GPIO_Port, LD1_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(LD1_GPIO_Port, LD1_Pin, GPIO_PIN_RESET);
osDelay(1999); osDelay(1000);
} }
/* USER CODE END 5 */ /* USER CODE END 5 */
} }
/* USER CODE BEGIN Header_start_terminal_task */ /* USER CODE BEGIN Header_start_terminal_task */
@ -581,48 +796,122 @@ void StartDefaultTask(void *argument)
/* USER CODE END Header_start_terminal_task */ /* USER CODE END Header_start_terminal_task */
void start_terminal_task(void *argument) void start_terminal_task(void *argument)
{ {
/* USER CODE BEGIN start_terminal_task */ /* USER CODE BEGIN start_terminal_task */
(void)argument; (void)argument;
HAL_StatusTypeDef status;
RTC_TimeTypeDef time;
RTC_DateTypeDef date;
/* Infinite loop */ /* Infinite loop */
for(;;) { for(;;) {
osDelay(1); status = HAL_RTC_GetTime(&hrtc, &time, RTC_FORMAT_BIN);
if (status != HAL_OK)
puts("HAL_RTC_GetTime problem...");
status = HAL_RTC_GetDate(&hrtc, &date, RTC_FORMAT_BIN);
printf("Date/Time: %02d%02d-%02d-%02d %02d:%02d:%02d\n", (date.Year < 22) ? 21 : 20, date.Year, date.Month, date.Date, time.Hours, time.Minutes, time.Seconds);
osDelay(999);
} }
/* USER CODE END start_terminal_task */ /* USER CODE END start_terminal_task */
} }
/* USER CODE BEGIN Header_start_id_task */ /* USER CODE BEGIN Header_start_morse_task */
/** /**
* @brief Function implementing the idTask thread. * @brief Function implementing the morseTask thread.
* @param argument: Not used * @param argument: Not used
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_id_task */ /* USER CODE END Header_start_morse_task */
void start_id_task(void *argument) void start_morse_task(void *argument)
{ {
/* USER CODE BEGIN start_id_task */ /* USER CODE BEGIN start_morse_task */
(void)argument; //unused argument static const uint32_t delay = 120;
//uint8_t tx_buf[80]; static const uint8_t clk = 0;
//int tx_buf_len; si5351_inst_t inst = argument;
/* check if the SI5351 is present */ int i = 0;
int status = HAL_I2C_IsDeviceReady(&hi2c1, SI5351_I2C_ADDR, 3, 10 /*HAL_MAX_DELAY*/ ); // HAL_MAX_DELAY is blocking, use 10 ms uint32_t morsedelay[3]; // words per minute ?
si5351_set_clk0(inst, 3550000);
osSemaphoreAcquire(data_accessHandle,osWaitForever);
si5351_read_data(inst, morsedelay);
morsedelay[clk] = delay;
si5351_write_data(inst, morsedelay);
osSemaphoreRelease(data_accessHandle);
/* Infinite loop */ /* Infinite loop */
for(;;) { for (;;) {
printf("\n" PROGRAM_ID "\n"); // check clock RTC for e.g. cycle of 1 minutes TX with 4 minutes pause period
printf(AUTHOR_STRING "\n"); morse(inst, 0, "MO");
if (status == HAL_OK) osDelay(7*morsedelay[clk]);
printf("Si5351 device found.\n"); if((++i % 8)==0) {
else osSemaphoreAcquire(data_accessHandle,osWaitForever);
printf("Error: Could not detect Si5351 device.\n"); si5351_read_data(inst, morsedelay);
morsedelay[clk] = delay/4;
si5351_write_data(inst, morsedelay);
osSemaphoreRelease(data_accessHandle);
morse(inst, clk, " f0x.at1 de oe3tkt ");
osSemaphoreAcquire(data_accessHandle,osWaitForever);
si5351_read_data(inst, morsedelay);
morsedelay[clk] = delay;
si5351_write_data(inst, morsedelay);
osSemaphoreRelease(data_accessHandle);
osDelay(7*morsedelay[clk]);
}
}
/* USER CODE END start_morse_task */
}
osDelay(30*60); /* USER CODE BEGIN Header_start_clk2_task */
} /**
/* USER CODE END start_id_task */ * @brief Function implementing the clk2Task thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_start_clk2_task */
void start_clk2_task(void *argument)
{
/* USER CODE BEGIN start_clk2_task */
static const uint32_t delay = 100;
static const uint8_t clk =2;
si5351_inst_t inst = argument;
int i = 0;
uint32_t morsedelay[3]; // words per minute ?
si5351_set_clk(inst, 3570000, clk, SI5351_PLLB);
osSemaphoreAcquire(data_accessHandle,osWaitForever);
si5351_read_data(inst, morsedelay);
morsedelay[clk] = delay;
si5351_write_data(inst, morsedelay);
osSemaphoreRelease(data_accessHandle);
/* Infinite loop */
for (;;) {
// check clock RTC for e.g. cycle of 1 minutes TX with 4 minutes pause period
morse(inst, 0, "MOs");
osDelay(7*morsedelay[clk]);
if((++i % 8)==0) {
osSemaphoreAcquire(data_accessHandle,osWaitForever);
si5351_read_data(inst, morsedelay);
morsedelay[clk] = delay/4;
si5351_write_data(inst, morsedelay);
osSemaphoreRelease(data_accessHandle);
morse(inst, clk, " f0x.at1 de oe3tkt ");
osSemaphoreAcquire(data_accessHandle,osWaitForever);
si5351_read_data(inst, morsedelay);
morsedelay[clk] = delay;
si5351_write_data(inst, morsedelay);
osSemaphoreRelease(data_accessHandle);
osDelay(7*morsedelay[clk]);
}
}
/* USER CODE END start_clk2_task */
} }
/** /**
* @brief Period elapsed callback in non blocking mode * @brief Period elapsed callback in non blocking mode
* @note This function is called when TIM16 interrupt took place, inside * @note This function is called when TIM6 interrupt took place, inside
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base. * a global variable "uwTick" used as application time base.
* @param htim : TIM handle * @param htim : TIM handle
@ -633,7 +922,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
/* USER CODE BEGIN Callback 0 */ /* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */ /* USER CODE END Callback 0 */
if (htim->Instance == TIM16) { if (htim->Instance == TIM6) {
HAL_IncTick(); HAL_IncTick();
} }
/* USER CODE BEGIN Callback 1 */ /* USER CODE BEGIN Callback 1 */
@ -669,6 +958,7 @@ void assert_failed(uint8_t *file, uint32_t line)
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number, /* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
printf("Wrong parameters value: file %s on line %d\r\n", file, line);
/* USER CODE END 6 */ /* USER CODE END 6 */
} }
#endif /* USE_FULL_ASSERT */ #endif /* USE_FULL_ASSERT */

1455
Core/Src/stm32_si5351.c
View File

File diff suppressed because it is too large Load Diff

55
Core/Src/stm32l4xx_hal_msp.c
View File

@ -237,6 +237,61 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
} }
/**
* @brief RTC MSP Initialization
* This function configures the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
{
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hrtc->Instance==RTC)
{
/* USER CODE BEGIN RTC_MspInit 0 */
/* USER CODE END RTC_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC;
PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
__HAL_RCC_RTC_ENABLE();
/* USER CODE BEGIN RTC_MspInit 1 */
/* USER CODE END RTC_MspInit 1 */
}
}
/**
* @brief RTC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
{
if(hrtc->Instance==RTC)
{
/* USER CODE BEGIN RTC_MspDeInit 0 */
/* USER CODE END RTC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_RTC_DISABLE();
/* USER CODE BEGIN RTC_MspDeInit 1 */
/* USER CODE END RTC_MspDeInit 1 */
}
}
/** /**
* @brief PCD MSP Initialization * @brief PCD MSP Initialization
* This function configures the hardware resources used in this example * This function configures the hardware resources used in this example

52
Core/Src/stm32l4xx_hal_timebase_tim.c
View File

@ -25,12 +25,12 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
TIM_HandleTypeDef htim16; TIM_HandleTypeDef htim6;
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** /**
* @brief This function configures the TIM16 as a time base source. * @brief This function configures the TIM6 as a time base source.
* The time source is configured to have 1ms time base with a dedicated * The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority. * Tick interrupt priority.
* @note This function is called automatically at the beginning of program after * @note This function is called automatically at the beginning of program after
@ -44,41 +44,41 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
uint32_t uwTimclock = 0; uint32_t uwTimclock = 0;
uint32_t uwPrescalerValue = 0; uint32_t uwPrescalerValue = 0;
uint32_t pFLatency; uint32_t pFLatency;
/*Configure the TIM16 IRQ priority */ /*Configure the TIM6 IRQ priority */
HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, TickPriority ,0); HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0);
/* Enable the TIM16 global Interrupt */ /* Enable the TIM6 global Interrupt */
HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn); HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
/* Enable TIM16 clock */ /* Enable TIM6 clock */
__HAL_RCC_TIM16_CLK_ENABLE(); __HAL_RCC_TIM6_CLK_ENABLE();
/* Get clock configuration */ /* Get clock configuration */
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
/* Compute TIM16 clock */ /* Compute TIM6 clock */
uwTimclock = HAL_RCC_GetPCLK2Freq(); uwTimclock = 2*HAL_RCC_GetPCLK1Freq();
/* Compute the prescaler value to have TIM16 counter clock equal to 1MHz */ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
/* Initialize TIM16 */ /* Initialize TIM6 */
htim16.Instance = TIM16; htim6.Instance = TIM6;
/* Initialize TIMx peripheral as follow: /* Initialize TIMx peripheral as follow:
+ Period = [(TIM16CLK/1000) - 1]. to have a (1/1000) s time base. + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ ClockDivision = 0 + ClockDivision = 0
+ Counter direction = Up + Counter direction = Up
*/ */
htim16.Init.Period = (1000000U / 1000U) - 1U; htim6.Init.Period = (1000000U / 1000U) - 1U;
htim16.Init.Prescaler = uwPrescalerValue; htim6.Init.Prescaler = uwPrescalerValue;
htim16.Init.ClockDivision = 0; htim6.Init.ClockDivision = 0;
htim16.Init.CounterMode = TIM_COUNTERMODE_UP; htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
if(HAL_TIM_Base_Init(&htim16) == HAL_OK) if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
{ {
/* Start the TIM time Base generation in interrupt mode */ /* Start the TIM time Base generation in interrupt mode */
return HAL_TIM_Base_Start_IT(&htim16); return HAL_TIM_Base_Start_IT(&htim6);
} }
/* Return function status */ /* Return function status */
@ -87,25 +87,25 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
/** /**
* @brief Suspend Tick increment. * @brief Suspend Tick increment.
* @note Disable the tick increment by disabling TIM16 update interrupt. * @note Disable the tick increment by disabling TIM6 update interrupt.
* @param None * @param None
* @retval None * @retval None
*/ */
void HAL_SuspendTick(void) void HAL_SuspendTick(void)
{ {
/* Disable TIM16 update Interrupt */ /* Disable TIM6 update Interrupt */
__HAL_TIM_DISABLE_IT(&htim16, TIM_IT_UPDATE); __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
} }
/** /**
* @brief Resume Tick increment. * @brief Resume Tick increment.
* @note Enable the tick increment by Enabling TIM16 update interrupt. * @note Enable the tick increment by Enabling TIM6 update interrupt.
* @param None * @param None
* @retval None * @retval None
*/ */
void HAL_ResumeTick(void) void HAL_ResumeTick(void)
{ {
/* Enable TIM16 Update interrupt */ /* Enable TIM6 Update interrupt */
__HAL_TIM_ENABLE_IT(&htim16, TIM_IT_UPDATE); __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
} }

19
Core/Src/stm32l4xx_it.c
View File

@ -56,7 +56,7 @@
/* External variables --------------------------------------------------------*/ /* External variables --------------------------------------------------------*/
extern UART_HandleTypeDef hlpuart1; extern UART_HandleTypeDef hlpuart1;
extern TIM_HandleTypeDef htim16; extern TIM_HandleTypeDef htim6;
/* USER CODE BEGIN EV */ /* USER CODE BEGIN EV */
@ -86,7 +86,8 @@ void NMI_Handler(void)
void HardFault_Handler(void) void HardFault_Handler(void)
{ {
/* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE BEGIN HardFault_IRQn 0 */
// printf("something went wrong -> HardFault_Handler called\n");
return;
/* USER CODE END HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */
while (1) while (1)
{ {
@ -161,17 +162,17 @@ void DebugMon_Handler(void)
/******************************************************************************/ /******************************************************************************/
/** /**
* @brief This function handles TIM1 update interrupt and TIM16 global interrupt. * @brief This function handles TIM6 global interrupt, DAC channel1 and channel2 underrun error interrupts.
*/ */
void TIM1_UP_TIM16_IRQHandler(void) void TIM6_DAC_IRQHandler(void)
{ {
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
/* USER CODE END TIM1_UP_TIM16_IRQn 0 */ /* USER CODE END TIM6_DAC_IRQn 0 */
HAL_TIM_IRQHandler(&htim16); HAL_TIM_IRQHandler(&htim6);
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
/* USER CODE END TIM1_UP_TIM16_IRQn 1 */ /* USER CODE END TIM6_DAC_IRQn 1 */
} }
/** /**

4
stm32l4a6zg-f0x.at1 Debug.launch
View File

@ -33,7 +33,7 @@
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/tom/STM32CubeIDE/workspace_1.9.0/stm32l4a6zg-f0x.at1/Debug/st-link_gdbserver_log.txt"/> <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/tom/STM32CubeIDE/workspace_1.9.0/stm32l4a6zg-f0x.at1/Debug/st-link_gdbserver_log.txt"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/> <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.max_halt_delay" value="2"/> <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.max_halt_delay" value="2"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.reset_strategy" value="connect_under_reset"/> <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.reset_strategy" value="system_reset"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_check_serial_number" value="true"/> <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_check_serial_number" value="true"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value="0668FF393430533457013222"/> <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value="0668FF393430533457013222"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/> <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
@ -75,6 +75,6 @@
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/> <listEntry value="4"/>
</listAttribute> </listAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;"/> <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;&gt;&lt;gdbmemoryBlockExpression address=&quot;536878292&quot; label=&quot;(inst)-&amp;gt;data&quot;/&gt;&lt;gdbmemoryBlockExpression address=&quot;537198516&quot; label=&quot;buf&quot;/&gt;&lt;/memoryBlockExpressionList&gt;"/>
<stringAttribute key="process_factory_id" value="com.st.stm32cube.ide.mcu.debug.launch.HardwareDebugProcessFactory"/> <stringAttribute key="process_factory_id" value="com.st.stm32cube.ide.mcu.debug.launch.HardwareDebugProcessFactory"/>
</launchConfiguration> </launchConfiguration>

69
stm32l4a6zg-f0x.at1.ioc
View File

@ -1,10 +1,13 @@
#MicroXplorer Configuration settings - do not modify #MicroXplorer Configuration settings - do not modify
FREERTOS.BinarySemaphores01=data_access,Dynamic,NULL
FREERTOS.FootprintOK=true FREERTOS.FootprintOK=true
FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT,FootprintOK FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT,FootprintOK,Queues01,configTOTAL_HEAP_SIZE,BinarySemaphores01
FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL;terminalTask,16,128,start_terminal_task,Default,NULL,Dynamic,NULL,NULL;idTask,8,128,start_id_task,Default,NULL,Dynamic,NULL,NULL FREERTOS.Queues01=morseQueue,16,uint16_t,0,Dynamic,NULL,NULL
FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL;terminalTask,16,128,start_terminal_task,Default,NULL,Dynamic,NULL,NULL;morseTask,24,128,start_morse_task,Default,si5351_inst,Dynamic,NULL,NULL;clk2Task,40,128,start_clk2_task,Default,si5351_inst,Dynamic,NULL,NULL
FREERTOS.configTOTAL_HEAP_SIZE=30000
FREERTOS.configUSE_NEWLIB_REENTRANT=1 FREERTOS.configUSE_NEWLIB_REENTRANT=1
File.Version=6 File.Version=6
GPIO.groupedBy= GPIO.groupedBy=Group By Peripherals
I2C1.IPParameters=Timing I2C1.IPParameters=Timing
I2C1.Timing=0x00505B89 I2C1.Timing=0x00505B89
KeepUserPlacement=false KeepUserPlacement=false
@ -30,13 +33,14 @@ Mcu.IP1=I2C1
Mcu.IP2=LPUART1 Mcu.IP2=LPUART1
Mcu.IP3=NVIC Mcu.IP3=NVIC
Mcu.IP4=RCC Mcu.IP4=RCC
Mcu.IP5=SYS Mcu.IP5=RTC
Mcu.IP6=USB_OTG_FS Mcu.IP6=SYS
Mcu.IPNb=7 Mcu.IP7=USB_OTG_FS
Mcu.IPNb=8
Mcu.Name=STM32L4A6ZGTx Mcu.Name=STM32L4A6ZGTx
Mcu.Package=LQFP144 Mcu.Package=LQFP144
Mcu.Pin0=PC13 Mcu.Pin0=PC14-OSC32_IN (PC14)
Mcu.Pin1=PC14-OSC32_IN (PC14) Mcu.Pin1=PC15-OSC32_OUT (PC15)
Mcu.Pin10=PA8 Mcu.Pin10=PA8
Mcu.Pin11=PA9 Mcu.Pin11=PA9
Mcu.Pin12=PA10 Mcu.Pin12=PA10
@ -47,18 +51,20 @@ Mcu.Pin16=PA14 (JTCK/SWCLK)
Mcu.Pin17=PB3 (JTDO/TRACESWO) Mcu.Pin17=PB3 (JTDO/TRACESWO)
Mcu.Pin18=PB7 Mcu.Pin18=PB7
Mcu.Pin19=PB8 Mcu.Pin19=PB8
Mcu.Pin2=PC15-OSC32_OUT (PC15) Mcu.Pin2=PH1-OSC_OUT (PH1)
Mcu.Pin20=PB9 Mcu.Pin20=PB9
Mcu.Pin21=VP_FREERTOS_VS_CMSIS_V2 Mcu.Pin21=VP_FREERTOS_VS_CMSIS_V2
Mcu.Pin22=VP_SYS_VS_tim16 Mcu.Pin22=VP_RTC_VS_RTC_Activate
Mcu.Pin3=PH1-OSC_OUT (PH1) Mcu.Pin23=VP_RTC_VS_RTC_Calendar
Mcu.Pin24=VP_SYS_VS_tim6
Mcu.Pin3=PA2
Mcu.Pin4=PB14 Mcu.Pin4=PB14
Mcu.Pin5=PG5 Mcu.Pin5=PG5
Mcu.Pin6=PG6 Mcu.Pin6=PG6
Mcu.Pin7=PG7 Mcu.Pin7=PG7
Mcu.Pin8=PG8 Mcu.Pin8=PG8
Mcu.Pin9=PC7 Mcu.Pin9=PC7
Mcu.PinsNb=23 Mcu.PinsNb=25
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32L4A6ZGTx Mcu.UserName=STM32L4A6ZGTx
@ -78,9 +84,9 @@ NVIC.SavedPendsvIrqHandlerGenerated=true
NVIC.SavedSvcallIrqHandlerGenerated=true NVIC.SavedSvcallIrqHandlerGenerated=true
NVIC.SavedSystickIrqHandlerGenerated=true NVIC.SavedSystickIrqHandlerGenerated=true
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:true NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:true
NVIC.TIM1_UP_TIM16_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true NVIC.TIM6_DAC_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
NVIC.TimeBase=TIM1_UP_TIM16_IRQn NVIC.TimeBase=TIM6_DAC_IRQn
NVIC.TimeBaseIP=TIM16 NVIC.TimeBaseIP=TIM6
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:true NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:true
PA10.GPIOParameters=GPIO_Label PA10.GPIOParameters=GPIO_Label
PA10.GPIO_Label=USB_ID PA10.GPIO_Label=USB_ID
@ -106,6 +112,8 @@ PA14\ (JTCK/SWCLK).GPIO_Label=TCK
PA14\ (JTCK/SWCLK).Locked=true PA14\ (JTCK/SWCLK).Locked=true
PA14\ (JTCK/SWCLK).Mode=Trace_Asynchronous_SW PA14\ (JTCK/SWCLK).Mode=Trace_Asynchronous_SW
PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK
PA2.Mode=Clock-out-LSCO
PA2.Signal=RCC_LSCO
PA8.GPIOParameters=GPIO_Label PA8.GPIOParameters=GPIO_Label
PA8.GPIO_Label=USB_SOF [TP1] PA8.GPIO_Label=USB_SOF [TP1]
PA8.Locked=true PA8.Locked=true
@ -139,10 +147,6 @@ PB9.GPIO_Pu=GPIO_PULLUP
PB9.Locked=true PB9.Locked=true
PB9.Mode=I2C PB9.Mode=I2C
PB9.Signal=I2C1_SDA PB9.Signal=I2C1_SDA
PC13.GPIOParameters=GPIO_Label
PC13.GPIO_Label=B1
PC13.Locked=true
PC13.Signal=GPXTI13
PC14-OSC32_IN\ (PC14).Locked=true PC14-OSC32_IN\ (PC14).Locked=true
PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator
PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN
@ -203,7 +207,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation= ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true,6-MX_RTC_Init-RTC-false-HAL-true
RCC.ADCFreq_Value=48000000 RCC.ADCFreq_Value=48000000
RCC.AHBFreq_Value=47333333.333333336 RCC.AHBFreq_Value=47333333.333333336
RCC.APB1CLKDivider=RCC_HCLK_DIV2 RCC.APB1CLKDivider=RCC_HCLK_DIV2
@ -214,7 +218,6 @@ RCC.APB2TimFreq_Value=47333333.333333336
RCC.CortexFreq_Value=47333333.333333336 RCC.CortexFreq_Value=47333333.333333336
RCC.DFSDMFreq_Value=23666666.666666668 RCC.DFSDMFreq_Value=23666666.666666668
RCC.FCLKCortexFreq_Value=47333333.333333336 RCC.FCLKCortexFreq_Value=47333333.333333336
RCC.FLatency=FLASH_LATENCY_2
RCC.FamilyName=M RCC.FamilyName=M
RCC.HCLKFreq_Value=47333333.333333336 RCC.HCLKFreq_Value=47333333.333333336
RCC.HSE_VALUE=8000000 RCC.HSE_VALUE=8000000
@ -224,11 +227,14 @@ RCC.I2C1Freq_Value=23666666.666666668
RCC.I2C2Freq_Value=23666666.666666668 RCC.I2C2Freq_Value=23666666.666666668
RCC.I2C3Freq_Value=23666666.666666668 RCC.I2C3Freq_Value=23666666.666666668
RCC.I2C4Freq_Value=23666666.666666668 RCC.I2C4Freq_Value=23666666.666666668
RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FLatency,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_Drive_Capability,LSE_Timout,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
RCC.LCDFreq_Value=32768
RCC.LPTIM1Freq_Value=23666666.666666668 RCC.LPTIM1Freq_Value=23666666.666666668
RCC.LPTIM2Freq_Value=23666666.666666668 RCC.LPTIM2Freq_Value=23666666.666666668
RCC.LPUART1Freq_Value=23666666.666666668 RCC.LPUART1Freq_Value=23666666.666666668
RCC.LSCOPinFreq_Value=32000 RCC.LSCOPinFreq_Value=32000
RCC.LSE_Drive_Capability=RCC_LSEDRIVE_HIGH
RCC.LSE_Timout=50000
RCC.LSI_VALUE=32000 RCC.LSI_VALUE=32000
RCC.MCO1PinFreq_Value=47333333.333333336 RCC.MCO1PinFreq_Value=47333333.333333336
RCC.MSI_VALUE=4000000 RCC.MSI_VALUE=4000000
@ -245,6 +251,8 @@ RCC.PLLSAI2PoutputFreq_Value=16000000
RCC.PLLSAI2RoutputFreq_Value=16000000 RCC.PLLSAI2RoutputFreq_Value=16000000
RCC.PWRFreq_Value=47333333.333333336 RCC.PWRFreq_Value=47333333.333333336
RCC.RNGFreq_Value=48000000 RCC.RNGFreq_Value=48000000
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
RCC.RTCFreq_Value=32768
RCC.SAI1Freq_Value=48000000 RCC.SAI1Freq_Value=48000000
RCC.SAI2Freq_Value=48000000 RCC.SAI2Freq_Value=48000000
RCC.SDMMCFreq_Value=48000000 RCC.SDMMCFreq_Value=48000000
@ -261,8 +269,13 @@ RCC.VCOInputFreq_Value=4000000
RCC.VCOOutputFreq_Value=284000000 RCC.VCOOutputFreq_Value=284000000
RCC.VCOSAI1OutputFreq_Value=96000000 RCC.VCOSAI1OutputFreq_Value=96000000
RCC.VCOSAI2OutputFreq_Value=32000000 RCC.VCOSAI2OutputFreq_Value=32000000
SH.GPXTI13.0=GPIO_EXTI13 RTC.Date=23
SH.GPXTI13.ConfNb=1 RTC.Hours=12
RTC.IPParameters=Hours,Minutes,Month,Date,Year,StoreOperation
RTC.Minutes=30
RTC.Month=RTC_MONTH_MAY
RTC.StoreOperation=RTC_STOREOPERATION_RESET
RTC.Year=22
USB_OTG_FS.IPParameters=low_power_enable,battery_charging_enable,lpm_enable,use_dedicated_ep1,vbus_sensing_enable,Sof_enable,VirtualMode USB_OTG_FS.IPParameters=low_power_enable,battery_charging_enable,lpm_enable,use_dedicated_ep1,vbus_sensing_enable,Sof_enable,VirtualMode
USB_OTG_FS.Sof_enable=ENABLE USB_OTG_FS.Sof_enable=ENABLE
USB_OTG_FS.VirtualMode=Device_Only USB_OTG_FS.VirtualMode=Device_Only
@ -273,8 +286,12 @@ USB_OTG_FS.use_dedicated_ep1=DISABLE
USB_OTG_FS.vbus_sensing_enable=ENABLE USB_OTG_FS.vbus_sensing_enable=ENABLE
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
VP_SYS_VS_tim16.Mode=TIM16 VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
VP_SYS_VS_tim16.Signal=SYS_VS_tim16 VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar
VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar
VP_SYS_VS_tim6.Mode=TIM6
VP_SYS_VS_tim6.Signal=SYS_VS_tim6
board=NUCLEO-L4A6ZG board=NUCLEO-L4A6ZG
boardIOC=true boardIOC=true
isbadioc=false isbadioc=false