First Commit, build a driver for the Si5153
This commit is contained in:
Tom Kuschel
173
Core/Inc/FreeRTOSConfig.h
Normal file
173
Core/Inc/FreeRTOSConfig.h
Normal file
@ -0,0 +1,173 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/*
|
||||
* FreeRTOS Kernel V10.3.1
|
||||
* Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* These parameters and more are described within the 'configuration' section of the
|
||||
* FreeRTOS API documentation available on the FreeRTOS.org web site.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* Section where include file can be added */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Ensure definitions are only used by the compiler, and not by the assembler. */
|
||||
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
|
||||
#include <stdint.h>
|
||||
extern uint32_t SystemCoreClock;
|
||||
#endif
|
||||
#ifndef CMSIS_device_header
|
||||
#define CMSIS_device_header "stm32l4xx.h"
|
||||
#endif /* CMSIS_device_header */
|
||||
|
||||
#define configENABLE_FPU 0
|
||||
#define configENABLE_MPU 0
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
#define configSUPPORT_DYNAMIC_ALLOCATION 1
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configCPU_CLOCK_HZ ( SystemCoreClock )
|
||||
#define configTICK_RATE_HZ ((TickType_t)1000)
|
||||
#define configMAX_PRIORITIES ( 56 )
|
||||
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
|
||||
#define configTOTAL_HEAP_SIZE ((size_t)3000)
|
||||
#define configMAX_TASK_NAME_LEN ( 16 )
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 8
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
|
||||
/* Defaults to size_t for backward compatibility, but can be changed
|
||||
if lengths will always be less than the number of bytes in a size_t. */
|
||||
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
|
||||
/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 2 )
|
||||
#define configTIMER_QUEUE_LENGTH 10
|
||||
#define configTIMER_TASK_STACK_DEPTH 256
|
||||
|
||||
/* The following flag must be enabled only when using newlib */
|
||||
#define configUSE_NEWLIB_REENTRANT 1
|
||||
|
||||
/* CMSIS-RTOS V2 flags */
|
||||
#define configUSE_OS2_THREAD_SUSPEND_RESUME 1
|
||||
#define configUSE_OS2_THREAD_ENUMERATE 1
|
||||
#define configUSE_OS2_EVENTFLAGS_FROM_ISR 1
|
||||
#define configUSE_OS2_THREAD_FLAGS 1
|
||||
#define configUSE_OS2_TIMER 1
|
||||
#define configUSE_OS2_MUTEX 1
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
#define INCLUDE_xQueueGetMutexHolder 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
|
||||
/*
|
||||
* The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used
|
||||
* by the application thus the correct define need to be enabled below
|
||||
*/
|
||||
#define USE_FreeRTOS_HEAP_4
|
||||
|
||||
/* Cortex-M specific definitions. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 4
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* Normal assert() semantics without relying on the provision of an assert.h
|
||||
header file. */
|
||||
/* USER CODE BEGIN 1 */
|
||||
#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
|
||||
standard names. */
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
|
||||
/* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */
|
||||
|
||||
#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 0
|
||||
|
||||
/* USER CODE BEGIN Defines */
|
||||
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
|
||||
/* USER CODE END Defines */
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
47
Core/Inc/at1_defines.h
Normal file
47
Core/Inc/at1_defines.h
Normal file
@ -0,0 +1,47 @@
|
||||
/******************************************************************************
|
||||
* File Name : at1_defines.h
|
||||
* Description : constants and defines for the project f0x.at1
|
||||
******************************************************************************
|
||||
* @author: Thomas Kuschel KW4NZ
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef AT1_DEFINES_H
|
||||
#define AT1_DEFINES_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
#ifndef STR_HELPER
|
||||
#define STR_HELPER(x) #x
|
||||
#define STR(x) STR_HELPER(x)
|
||||
#endif
|
||||
#define VERSION_MAJOR 0
|
||||
#define VERSION_MINOR 1
|
||||
#define PROGRAM_ID "f0x.at1 Version " STR(VERSION_MAJOR) "." STR(VERSION_MINOR)
|
||||
#define VERSION_STRING STR(VERSION_MAJOR) "." STR(VERION_MINOR)
|
||||
//#define DATE __DATE__
|
||||
#define AUTHOR_STRING "Tom Kuschel KW4NZ"
|
||||
// From SI5351 datasheet:
|
||||
#define SI5351_I2C_ADDR (0x60 << 1)
|
||||
|
||||
/* Exported variables --------------------------------------------------------*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /* AT1_DEFINES_H */
|
||||
100
Core/Inc/main.h
Normal file
100
Core/Inc/main.h
Normal file
@ -0,0 +1,100 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
|
||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l4xx_hal.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
#define B1_Pin GPIO_PIN_13
|
||||
#define B1_GPIO_Port GPIOC
|
||||
#define LD3_Pin GPIO_PIN_14
|
||||
#define LD3_GPIO_Port GPIOB
|
||||
#define USB_OverCurrent_Pin GPIO_PIN_5
|
||||
#define USB_OverCurrent_GPIO_Port GPIOG
|
||||
#define USB_PowerSwitchOn_Pin GPIO_PIN_6
|
||||
#define USB_PowerSwitchOn_GPIO_Port GPIOG
|
||||
#define STLK_RX_Pin GPIO_PIN_7
|
||||
#define STLK_RX_GPIO_Port GPIOG
|
||||
#define STLK_TX_Pin GPIO_PIN_8
|
||||
#define STLK_TX_GPIO_Port GPIOG
|
||||
#define LD1_Pin GPIO_PIN_7
|
||||
#define LD1_GPIO_Port GPIOC
|
||||
#define USB_SOF_Pin GPIO_PIN_8
|
||||
#define USB_SOF_GPIO_Port GPIOA
|
||||
#define USB_VBUS_Pin GPIO_PIN_9
|
||||
#define USB_VBUS_GPIO_Port GPIOA
|
||||
#define USB_ID_Pin GPIO_PIN_10
|
||||
#define USB_ID_GPIO_Port GPIOA
|
||||
#define USB_DM_Pin GPIO_PIN_11
|
||||
#define USB_DM_GPIO_Port GPIOA
|
||||
#define USB_DP_Pin GPIO_PIN_12
|
||||
#define USB_DP_GPIO_Port GPIOA
|
||||
#define TMS_Pin GPIO_PIN_13
|
||||
#define TMS_GPIO_Port GPIOA
|
||||
#define TCK_Pin GPIO_PIN_14
|
||||
#define TCK_GPIO_Port GPIOA
|
||||
#define SWO_Pin GPIO_PIN_3
|
||||
#define SWO_GPIO_Port GPIOB
|
||||
#define LD2_Pin GPIO_PIN_7
|
||||
#define LD2_GPIO_Port GPIOB
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
525
Core/Inc/si5351.h
Normal file
525
Core/Inc/si5351.h
Normal file
@ -0,0 +1,525 @@
|
||||
/*
|
||||
* si5351.h
|
||||
*
|
||||
* Created on: Feb 16, 2018
|
||||
* Author: Petr Polasek
|
||||
*
|
||||
* To make this library useable on any other device than
|
||||
* STM32Fxxx Cortex Mx, please edit these parts of the library:
|
||||
*
|
||||
* DEFINES:
|
||||
* SI5351_I2C_PERIPHERAL - the I2C peripheral name according
|
||||
* to your devices HAL library
|
||||
* I2C_TIMEOUT - time for the communication to time out
|
||||
*
|
||||
* TYPEDEFS:
|
||||
* Si5351_ConfigTypeDef - the I2Cx parameter should be changed
|
||||
* so that its type corresponds to your HAL library
|
||||
*
|
||||
* FUNCTIONS:
|
||||
* Si5351_WriteRegister
|
||||
* Si5351_ReadRegister
|
||||
* You need to write your own I2C handlers here
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef SI5351_H_
|
||||
#define SI5351_H_
|
||||
|
||||
#include "stm32l4xx_hal.h"
|
||||
|
||||
#define SI5351_I2C_ADDRESS 0xC0 //default I2C address of Si5351
|
||||
#define SI5351_I2C_PERIPHERAL I2C1 //default I2C interface
|
||||
|
||||
#define SI5351_XTAL_FREQ 25000000 // sets default value, 25000000 for 25 MHz, 27000000 for 27 MHz
|
||||
#define SI5351_CLKIN_FREQ 0 // set in Hz
|
||||
|
||||
#ifdef I2C_TIMEOUT
|
||||
#undef I2C_TIMEOUT
|
||||
#endif
|
||||
#define I2C_TIMEOUT 100000 //I2C timeout for wait loops
|
||||
|
||||
#define SI5351_TIMEOUT (I2C_TIMEOUT * 10)
|
||||
|
||||
#ifndef ENABLESTATE
|
||||
#define ENABLESTATE
|
||||
typedef enum
|
||||
{
|
||||
OFF = 0,
|
||||
ON = 1
|
||||
} EnableState;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This section contains register addresses and bit masks for
|
||||
* the device status registers.
|
||||
*/
|
||||
|
||||
#define REG_DEV_STATUS 0
|
||||
#define DEV_SYS_INIT_MASK 0x80
|
||||
#define DEV_LOL_B_MASK 0x40
|
||||
#define DEV_LOL_A_MASK 0x20
|
||||
#define DEV_LOS_CLKIN_MASK 0x10
|
||||
#define DEV_LOS_XTAL_MASK 0x08
|
||||
#define DEV_REVID_MASK 0x03
|
||||
|
||||
#define REG_DEV_STICKY 1
|
||||
#define DEV_STKY_SYS_INIT_MASK 0x80
|
||||
#define DEV_STKY_LOL_B_MASK 0x40
|
||||
#define DEV_STKY_LOL_A_MASK 0x20
|
||||
#define DEV_STKY_LOS_CLKIN_MASK 0x10
|
||||
#define DEV_STKY_LOS_XTAL_MASK 0x08
|
||||
|
||||
#define REG_INT_MASK 2
|
||||
#define INT_MASK_SYS_INIT_MASK 0x80
|
||||
#define INT_MASK_LOL_B_MASK 0x40
|
||||
#define INT_MASK_LOL_A_MASK 0x20
|
||||
#define INT_MASK_LOS_CLKIN_MASK 0x10
|
||||
#define INT_MASK_LOS_XTAL_MASK 0x08
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* oscillator, VCXO and CLKIN section.
|
||||
*/
|
||||
|
||||
#define REG_XTAL_CL 183
|
||||
#define XTAL_CL_MASK 0xC0
|
||||
#define PLL_CL_MASK 0x36
|
||||
|
||||
//this sets the crystal load capacitance
|
||||
typedef enum
|
||||
{
|
||||
XTAL_Load_4_pF = 0x00,
|
||||
XTAL_Load_6_pF = 0x40,
|
||||
XTAL_Load_8_pF = 0x80,
|
||||
XTAL_Load_10_pF = 0xC0
|
||||
} Si5351_XTALLoadTypeDef;
|
||||
|
||||
//The following is an unexplained parameter. However someone from SiLabs called it "VCO load cap".
|
||||
//Lower settings seem to be more stable on higher frequencies, higher settings are more stable on lower frequencies allowing to tune the PLL to <200 MHz.
|
||||
typedef enum
|
||||
{
|
||||
PLL_Capacitive_Load_0 = 0,
|
||||
PLL_Capacitive_Load_1 = 1,
|
||||
PLL_Capacitive_Load_2 = 2
|
||||
} Si5351_PLLCapacitiveLoadTypeDef;
|
||||
|
||||
#define REG_CLKIN_DIV 15
|
||||
#define CLKIN_MASK 0xC0
|
||||
|
||||
//this sets the CLKIN pre-divider, after division, CLKIN should
|
||||
//fall between 10-40 MHz
|
||||
typedef enum
|
||||
{
|
||||
CLKINDiv_Div1 = 0x00,
|
||||
CLKINDiv_Div2 = 0x40,
|
||||
CLKINDiv_Div4 = 0x80,
|
||||
CLKINDiv_Div8 = 0xC0
|
||||
} Si5351_CLKINDivTypeDef;
|
||||
|
||||
#define REG_FANOUT_EN 187
|
||||
#define FANOUT_CLKIN_EN_MASK 0x80
|
||||
#define FANOUT_XO_EN_MASK 0x40
|
||||
#define FANOUT_MS_EN_MASK 0x10
|
||||
|
||||
#define REG_VCXO_PARAM_0_7 162
|
||||
#define REG_VCXO_PARAM_8_15 163
|
||||
#define REG_VCXO_PARAM_16_21 164
|
||||
#define VCXO_PARAM_16_21_MASK 0x3F
|
||||
#define VCXO_PARAM_MASK 0x003FFFFF
|
||||
|
||||
#define APR_MINIMUM 30 //minimum pull range
|
||||
#define APR_MAXIMUM 240 //maximum pull range
|
||||
|
||||
#define CLKIN_MINIMUM 10000 //minimum CLKIN frequency after division in kHz
|
||||
#define CLKIN_MAXIMUM 40000 //maximum CLKIN frequency after division in kHz
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Si5351_XTALLoadTypeDef OSC_XTAL_Load; //capacitive load of XTAL, 10pF by default
|
||||
Si5351_CLKINDivTypeDef CLKIN_Div; //CLKIN predivision, input f to PLL must be 10-40 MHz
|
||||
uint8_t VCXO_Pull_Range_ppm; //can range from +-30 ppm to 240ppm
|
||||
} Si5351_OSCConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* PLL (PLLA and PLLB)
|
||||
*/
|
||||
|
||||
#define REG_PLL_CLOCK_SOURCE 15
|
||||
#define PLLA_CLOCK_SOURCE_MASK 0x04
|
||||
#define PLLB_CLOCK_SOURCE_MASK 0x08
|
||||
|
||||
//this selects the clock source for the PLL
|
||||
typedef enum
|
||||
{
|
||||
PLL_Clock_Source_XTAL = 0x00,
|
||||
PLL_Clock_Source_CLKIN = 0x0C //0x04 for PLLA, 0x08 for PLLB, use mask!
|
||||
} Si5351_PLLClockSourceTypeDef;
|
||||
|
||||
#define REG_FB_INT 22
|
||||
#define FB_INT_MASK 0x40
|
||||
|
||||
#define REG_PLL_RESET 177
|
||||
#define PLLA_RESET_MASK 0x20
|
||||
#define PLLB_RESET_MASK 0x80
|
||||
|
||||
#define REG_MSN_P1_0_7 30
|
||||
#define REG_MSN_P1_8_15 29
|
||||
#define REG_MSN_P1_16_17 28
|
||||
#define MSN_P1_16_17_MASK 0x03
|
||||
|
||||
#define REG_MSN_P2_0_7 33
|
||||
#define REG_MSN_P2_8_15 32
|
||||
#define REG_MSN_P2_16_19 31
|
||||
#define MSN_P2_16_19_MASK 0x0F
|
||||
|
||||
#define REG_MSN_P3_0_7 27
|
||||
#define REG_MSN_P3_8_15 26
|
||||
#define REG_MSN_P3_16_19 31
|
||||
#define MSN_P3_16_19_MASK 0xF0
|
||||
|
||||
#define MSNA_MSNB_OFFSET 8
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t PLL_Multiplier_Integer;
|
||||
uint32_t PLL_Multiplier_Numerator;
|
||||
uint32_t PLL_Multiplier_Denominator;
|
||||
Si5351_PLLClockSourceTypeDef PLL_Clock_Source;
|
||||
Si5351_PLLCapacitiveLoadTypeDef PLL_Capacitive_Load;
|
||||
} Si5351_PLLConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* Spread Spectrum feature.
|
||||
*/
|
||||
|
||||
#define REG_SSC_MODE 151
|
||||
#define SSC_MODE_MASK 0x80
|
||||
|
||||
//this selects the Spread Spectrum mode
|
||||
typedef enum
|
||||
{
|
||||
SS_Mode_DownSpread = 0x00,
|
||||
SS_Mode_CenterSpread = 0x80
|
||||
} Si5351_SSModeTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SS_NCLK_0 = 0x00,
|
||||
SS_NCLK_1 = 0x10,
|
||||
SS_NCLK_2 = 0x20,
|
||||
SS_NCLK_3 = 0x30,
|
||||
SS_NCLK_4 = 0x40,
|
||||
SS_NCLK_5 = 0x50,
|
||||
SS_NCLK_6 = 0x60,
|
||||
SS_NCLK_7 = 0x70,
|
||||
SS_NCLK_8 = 0x80,
|
||||
SS_NCLK_9 = 0x90,
|
||||
SS_NCLK_10 = 0xA0,
|
||||
SS_NCLK_11 = 0xB0,
|
||||
SS_NCLK_12 = 0xC0,
|
||||
SS_NCLK_13 = 0xD0,
|
||||
SS_NCLK_14 = 0xE0,
|
||||
SS_NCLK_15 = 0xF0
|
||||
} Si5351_SSNCLKTypeDef;
|
||||
|
||||
#define REG_SSDN_P1_0_7 153
|
||||
#define REG_SSDN_P1_8_11 154
|
||||
#define SSDN_P1_8_11_MASK 0x0F
|
||||
|
||||
#define REG_SSDN_P2_0_7 150
|
||||
#define REG_SSDN_P2_8_14 149
|
||||
#define SSDN_P2_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSDN_P3_0_7 152
|
||||
#define REG_SSDN_P3_8_14 151
|
||||
#define SSDN_P3_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSUDP_0_7 155
|
||||
#define REG_SSUDP_8_11 154
|
||||
#define SSUDP_8_11_MASK 0xF0
|
||||
|
||||
#define REG_SSUP_P1_0_7 160
|
||||
#define REG_SSUP_P1_8_11 161
|
||||
#define SSUP_P1_8_11_MASK 0x0F
|
||||
|
||||
#define REG_SSUP_P2_0_7 157
|
||||
#define REG_SSUP_P2_8_14 156
|
||||
#define SSUP_P2_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSUP_P3_0_7 159
|
||||
#define REG_SSUP_P3_8_14 158
|
||||
#define SSUP_P3_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSC_EN 149
|
||||
#define SSC_EN_MASK 0x80
|
||||
|
||||
#define REG_SS_NCLK 161
|
||||
#define SS_NCLK_MASK 0xF0
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SS_Amplitude_ppm; //amplitude of the SS feature in ppm of center frequency
|
||||
EnableState SS_Enable;
|
||||
Si5351_SSModeTypeDef SS_Mode;
|
||||
Si5351_SSNCLKTypeDef SS_NCLK;
|
||||
} Si5351_SSConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* Output Multisynth.
|
||||
*/
|
||||
|
||||
//this selects the Multisynth clock source
|
||||
typedef enum
|
||||
{
|
||||
MS_Clock_Source_PLLA = 0x00,
|
||||
MS_Clock_Source_PLLB = 0x20
|
||||
} Si5351_MSClockSourceTypeDef;
|
||||
|
||||
#define REG_MS_P1_0_7 46
|
||||
#define REG_MS_P1_8_15 45
|
||||
#define REG_MS_P1_16_17 44
|
||||
#define MS_P1_16_17_MASK 0x03
|
||||
|
||||
#define REG_MS_P2_0_7 49
|
||||
#define REG_MS_P2_8_15 48
|
||||
#define REG_MS_P2_16_19 47
|
||||
#define MS_P2_16_19_MASK 0x0F
|
||||
|
||||
#define REG_MS_P3_0_7 43
|
||||
#define REG_MS_P3_8_15 42
|
||||
#define REG_MS_P3_16_19 47
|
||||
#define MS_P3_16_19_MASK 0xF0
|
||||
|
||||
#define REG_MS67_P1 90
|
||||
|
||||
#define REG_MS_INT 16
|
||||
#define MS_INT_MASK 0x40
|
||||
|
||||
#define REG_MS_DIVBY4 44
|
||||
#define MS_DIVBY4_MASK 0x0C
|
||||
|
||||
#define REG_MS_SRC 16
|
||||
#define MS_SRC_MASK 0x20
|
||||
|
||||
#define MS_SETUP_STEP 1
|
||||
#define MS_DIVIDER_STEP 8
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Si5351_MSClockSourceTypeDef MS_Clock_Source; //select source on MS input
|
||||
uint32_t MS_Divider_Integer; //the integer part of divider, called "a"
|
||||
uint32_t MS_Divider_Numerator; //the numerator, called "b"
|
||||
uint32_t MS_Divider_Denominator; //the denominator, called "c"
|
||||
} Si5351_MSConfigTypeDef; //sets MS divider ( a+(b/c) ) and clock (PLLA/PLLB)
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* CLK, R divider and output stage (joined together because they make
|
||||
* a tight block without any multiplexer).
|
||||
*/
|
||||
|
||||
#define REG_CLK_SRC 16
|
||||
#define CLK_SRC_MASK 0x0C
|
||||
|
||||
//this sets the CLK source clock
|
||||
typedef enum
|
||||
{
|
||||
CLK_Clock_Source_XTAL = 0x00,
|
||||
CLK_Clock_Source_CLKIN = 0x04,
|
||||
CLK_Clock_Source_MS0_MS4 = 0x08, //this uses MS0 for CLK0..3 and MS4 for CLK4..7
|
||||
CLK_Clock_Source_MS_Own = 0x0C //this uses MSx for CLKx
|
||||
} Si5351_CLKClockSourceTypeDef; //configures multiplexer on CLK input
|
||||
|
||||
#define REG_CLK_R_DIV 44
|
||||
#define CLK_R_DIV_MASK 0x70
|
||||
|
||||
#define REG_CLK_R67_DIV 92
|
||||
#define CLK_R67_DIV_MASK 0x07
|
||||
|
||||
//this sets the R divider ratio
|
||||
typedef enum
|
||||
{
|
||||
CLK_R_Div1 = 0x00,
|
||||
CLK_R_Div2 = 0x10,
|
||||
CLK_R_Div4 = 0x20,
|
||||
CLK_R_Div8 = 0x30,
|
||||
CLK_R_Div16 = 0x40,
|
||||
CLK_R_Div32 = 0x50,
|
||||
CLK_R_Div64 = 0x60,
|
||||
CLK_R_Div128 = 0x70
|
||||
} Si5351_CLKRDivTypeDef;
|
||||
|
||||
#define REG_CLK_DIS_STATE 24
|
||||
#define CLK_DIS_STATE_MASK 0x03
|
||||
|
||||
//this sets output buffer behaviour when disabled
|
||||
typedef enum
|
||||
{
|
||||
CLK_Disable_State_LOW = 0x00,
|
||||
CLK_Disable_State_HIGH = 0x01,
|
||||
CLK_Disable_State_HIGH_Z = 0x02, //three-stated when off
|
||||
CLK_Disable_State_ALWAYS_ON = 0x03 //cannot be disabled
|
||||
} Si5351_CLKDisableStateTypeDef;
|
||||
|
||||
#define REG_CLK_IDRV 16
|
||||
#define CLK_IDRV_MASK 0x03
|
||||
|
||||
//this sets current drive of the output buffer
|
||||
typedef enum
|
||||
{
|
||||
CLK_I_Drv_2mA = 0x00,
|
||||
CLK_I_Drv_4mA = 0x01,
|
||||
CLK_I_Drv_6mA = 0x02,
|
||||
CLK_I_Drv_8mA = 0x03
|
||||
} Si5351_CLKIDrvTypeDef;
|
||||
|
||||
#define REG_CLK_PHOFF 165
|
||||
#define CLK_PHOFF_MASK 0x7F
|
||||
|
||||
#define REG_CLK_EN 3
|
||||
|
||||
#define REG_CLK_INV 16
|
||||
#define CLK_INV_MASK 0x10
|
||||
|
||||
#define REG_CLK_PDN 16
|
||||
#define CLK_PDN_MASK 0x80
|
||||
|
||||
#define REG_CLK_OEB 9
|
||||
|
||||
#define CLK_PHOFF_STEP 1
|
||||
#define CLK_SETUP_STEP 1
|
||||
#define CLK_R_DIV_STEP 8
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Si5351_CLKClockSourceTypeDef CLK_Clock_Source; //clock source
|
||||
|
||||
/* this sets the time offset of the CLK channel, basic unit
|
||||
* is one quarter of the VCO period (90deg offset),
|
||||
* set it to 4*fVCO*toffset, the value is 7-bit, the max time offset
|
||||
* varies between 35 and 53 ns (1 cycle for 28 and 19 MHz, respectively)
|
||||
* according to the current frequency of the VCO
|
||||
*/
|
||||
uint8_t CLK_QuarterPeriod_Offset;
|
||||
|
||||
Si5351_CLKRDivTypeDef CLK_R_Div; //R divider value (only powers of 2)
|
||||
EnableState CLK_Invert; //invert output clock
|
||||
EnableState CLK_Enable; //enable flag
|
||||
EnableState CLK_PowerDown; //powerdown flag
|
||||
Si5351_CLKDisableStateTypeDef CLK_Disable_State; //sets output behaviour when disabled
|
||||
Si5351_CLKIDrvTypeDef CLK_I_Drv; //output driver current drive strength
|
||||
EnableState CLK_Use_OEB_Pin; //allows using OEB pin to enable clock
|
||||
} Si5351_CLKConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains main data structure for Si5351 configuration
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/*
|
||||
* These are frequencies of the input clocks, set it in Hz.
|
||||
*/
|
||||
uint32_t f_XTAL;
|
||||
uint32_t f_CLKIN;
|
||||
|
||||
//Interrupt masking - enabling it disables the int source from pulling INTR low
|
||||
EnableState Interrupt_Mask_SysInit;
|
||||
EnableState Interrupt_Mask_PLLB;
|
||||
EnableState Interrupt_Mask_PLLA;
|
||||
EnableState Interrupt_Mask_CLKIN;
|
||||
EnableState Interrupt_Mask_XTAL;
|
||||
|
||||
//Fanout enable - enables internal clock routing
|
||||
EnableState Fanout_MS_EN;
|
||||
EnableState Fanout_XO_EN;
|
||||
EnableState Fanout_CLKIN_EN;
|
||||
|
||||
I2C_TypeDef *I2Cx; //the I2C interface that will be used
|
||||
uint8_t HW_I2C_Address; //I2C address of the Si5351 for the packages with A0 pin
|
||||
//(also, some duds with strange address reported)
|
||||
Si5351_OSCConfigTypeDef OSC; //Oscillator, CLKIN and VCXO settings
|
||||
Si5351_PLLConfigTypeDef PLL[2]; //PLL settings for PLLA and PLLB
|
||||
Si5351_MSConfigTypeDef MS[8]; //MultiSynth[0..7] settings
|
||||
Si5351_CLKConfigTypeDef CLK[8]; //CLK[0..7], R divider and output stage settings
|
||||
Si5351_SSConfigTypeDef SS; //spread spectrum settings
|
||||
} Si5351_ConfigTypeDef;
|
||||
|
||||
/*
|
||||
* Typedefs for selecting PLL, MS and CLK to be used
|
||||
*/
|
||||
|
||||
//this selects PLL channel
|
||||
typedef enum
|
||||
{
|
||||
PLL_A = 0,
|
||||
PLL_B = 1
|
||||
} Si5351_PLLChannelTypeDef;
|
||||
|
||||
//this selects Multisynth channel
|
||||
typedef enum
|
||||
{
|
||||
MS0 = 0,
|
||||
MS1 = 1,
|
||||
MS2 = 2,
|
||||
MS3 = 3,
|
||||
MS4 = 4,
|
||||
MS5 = 5,
|
||||
MS6 = 6,
|
||||
MS7 = 7
|
||||
} Si5351_MSChannelTypeDef;
|
||||
|
||||
//this selects CLK channel
|
||||
typedef enum
|
||||
{
|
||||
CLK0 = 0,
|
||||
CLK1 = 1,
|
||||
CLK2 = 2,
|
||||
CLK3 = 3,
|
||||
CLK4 = 4,
|
||||
CLK5 = 5,
|
||||
CLK6 = 6,
|
||||
CLK7 = 7
|
||||
} Si5351_CLKChannelTypeDef;
|
||||
|
||||
//this selects device status flag
|
||||
typedef enum
|
||||
{
|
||||
StatusBit_SysInit = DEV_SYS_INIT_MASK,
|
||||
StatusBit_PLLA = DEV_STKY_LOL_A_MASK,
|
||||
StatusBit_PLLB = DEV_LOL_B_MASK,
|
||||
StatusBit_CLKIN = DEV_LOS_CLKIN_MASK,
|
||||
StatusBit_XTAL = DEV_LOS_XTAL_MASK,
|
||||
} Si5351_StatusBitTypeDef;
|
||||
|
||||
//these write to and read from a Si5351 register, for porting
|
||||
//purposes, these functions should be the only ones which should need edits
|
||||
int Si5351_WriteRegister(Si5351_ConfigTypeDef *Si5351_ConfigStruct, uint8_t reg_address, uint8_t reg_data);
|
||||
uint8_t Si5351_ReadRegister(Si5351_ConfigTypeDef *Si5351_ConfigStruct, uint8_t reg_address);
|
||||
|
||||
void Si5351_StructInit(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
void Si5351_OSCConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
EnableState Si5351_CheckStatusBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
|
||||
EnableState Si5351_CheckStickyBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
|
||||
void Si5351_InterruptConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
void Si5351_ClearStickyBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
|
||||
|
||||
void Si5351_PLLConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_PLLChannelTypeDef PLL_Channel);
|
||||
void Si5351_PLLReset(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_PLLChannelTypeDef PLL_Channel);
|
||||
void Si5351_PLLSimultaneousReset(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
void Si5351_SSConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
void Si5351_MSConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_MSChannelTypeDef MS_Channel);
|
||||
|
||||
void Si5351_CLKPowerCmd(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_CLKChannelTypeDef CLK_Channel);
|
||||
void Si5351_CLKConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_CLKChannelTypeDef CLK_Channel);
|
||||
|
||||
int Si5351_Init(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
#endif /* SI5351_H_ */
|
||||
624
Core/Inc/stm32_si5351.h
Normal file
624
Core/Inc/stm32_si5351.h
Normal file
@ -0,0 +1,624 @@
|
||||
/******************************************************************************
|
||||
* File Name : stm32_si5351.h
|
||||
* Description : STM32 library/driver for the Si5351 clock chip
|
||||
* from Skyworks Solutions, Inc. (former SiLabs)
|
||||
******************************************************************************
|
||||
* @author: Thomas Kuschel KW4NZ, created 2022-05-11
|
||||
*
|
||||
* originally written by Petr Polasek, created Feb 16, 2018
|
||||
******************************************************************************
|
||||
* DO NOT EDIT THIS FILE FOR CONFIGURATION, USE THE FOLLOWING PROCEDURE:
|
||||
*
|
||||
* Inside your main.c program or within your STM32 code:
|
||||
* Include this header to the the main.c: #include "stm32_si5351.h"
|
||||
* You've to initialize the I2C functionality first (e.g. with STM32CubeIDE)
|
||||
* Afterwards, when there is a handle like "I2C_HandleTypeDef hi2c1;",
|
||||
* you simply initialize this stm32_si5351 library in your main.c ,
|
||||
* just after the MX_I2C1_Init();
|
||||
* so between the USER CODE like using the given i2c handle "hi2c1":
|
||||
*
|
||||
* /\* USER CODE BEGIN 2 *\/
|
||||
* si5351_init(&hi2c1);
|
||||
* /\* USER CODE END 2 *\/
|
||||
*
|
||||
* The 7-bit device (slave) address of the Si5351 consist of a 6-bit fixed
|
||||
* address plus a user selectable LSB bit as shown in Figure 6 of the datasheet.
|
||||
* The LSB bit is selectable as 0 or 1 using the optional A0 pin which is useful
|
||||
* for applications that require more than one Si5351 on a single I2C bus.
|
||||
* Only the Si5351A 20-QFN and Si5351A 16-QFN have the A0 LSB pin option.
|
||||
* If a part does not have the A0 pin, the default address is 0x60 with
|
||||
* the A0 bit set to 0.
|
||||
*
|
||||
* So additionally you may drive more then one Si5351 at the same or
|
||||
* another I2C bus when calling the init function with the given
|
||||
* I2C bus address (default: 0x60)
|
||||
* ( - internally this I2C address is shifted to the left
|
||||
* for the proper usage of the I2C HAL driver i.e. it becomes 0xC0 )
|
||||
*
|
||||
* Example:
|
||||
* \\ Define handlers for the sum of three SI5351 clock generators:
|
||||
* si5351_HandleTypeDef h_si5351[3];
|
||||
*
|
||||
* // 1st SI5351 chip and with an A0 = 0:
|
||||
* h_si5351[0] = si5351_init(&hi2c1, 25000000, 0x60);
|
||||
* // 2nd SI5351 chip on the same I2C bus "hi2c1" but address line A0 = 1
|
||||
* h_si5351[1] = si5351_init(&hi2c1, 27000000, 0x61);
|
||||
* // 3rd SI5351 chip on another IC2 bus with handle "hi2c2" *\/
|
||||
* h_si5351[2] = si5351_init(&hi2c2, 25000000, 0x60);
|
||||
*
|
||||
* PROs:
|
||||
* The library is preemptive and can be used within an operating system.
|
||||
* All structures and used variables are dynamically allocated.
|
||||
* CONs:
|
||||
* Not fully tested, but used with FreeRTOS and with 2 I2C bus systems.
|
||||
*
|
||||
* CHANGES:
|
||||
* - Removed several defines, enums, etc. from the header file, b/c we do not
|
||||
* want to export them to other programs
|
||||
*
|
||||
*
|
||||
* The old simple example to get 50 kHz output with an 25 MHz crystal:
|
||||
* Si5351_ConfigTypeDef Si5351_ConfigStruct;
|
||||
* Si5351_StructInit(&Si5351_ConfigStruct); //initialize the structure with default "safe" values
|
||||
* Si5351_ConfigStruct.OSC.OSC_XTAL_Load = XTAL_Load_8_pF; //use 8 pF load for crystal
|
||||
* Si5351_ConfigStruct.PLL[0].PLL_Clock_Source = PLL_Clock_Source_XTAL; //select xrystal as clock input for the PLL
|
||||
* Si5351_ConfigStruct.PLL[0].PLL_Multiplier_Integer = 32; //multiply the clock frequency by 32, this gets us 800 MHz clock
|
||||
* Si5351_ConfigStruct.MS[0].MS_Clock_Source = MS_Clock_Source_PLLA; //select PLLA as clock source for MultiSynth 0
|
||||
* Si5351_ConfigStruct.MS[0].MS_Divider_Integer = 250; //divide the 800 MHz by 250 this gets us 3.2 MHz
|
||||
* Si5351_ConfigStruct.CLK[0].CLK_R_Div = CLK_R_Div64; //divide the MultiSynth output by 64, this gets us 50 kHz
|
||||
* Si5351_ConfigStruct.CLK[0].CLK_Enable = ON; //turn on the output
|
||||
* Si5351_Init(&Si5351_ConfigStruct); //apply the changes
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32_SI5351_H
|
||||
#define STM32_SI5351_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include <stdint.h>
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Si5351 instance typedef */
|
||||
typedef struct __SI5351_HandleTypeDef *si5351_inst_t;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @enum errno_t Error Number Constants
|
||||
*/
|
||||
typedef enum {
|
||||
EPERM = 1, /*!< Operation not permitted */
|
||||
ENOMEM = 12, /*!< Out of memory */
|
||||
ENODEV = 19, /*!< No such device */
|
||||
EINVAL = 22, /*!< Invalid argument */
|
||||
EADDRINUSE = 98 /*!< Address already in use */
|
||||
} si5351_errno_t;
|
||||
|
||||
/* Exported variables --------------------------------------------------------*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
si5351_inst_t si5351_init(void * i2c_handle, uint32_t xtal_frequency, uint8_t i2c_address);
|
||||
int si5351_deinit(si5351_inst_t si5351_handle);
|
||||
int si5351_isready(si5351_inst_t inst);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /* STM32_SI5351_H */
|
||||
|
||||
/*
|
||||
* si5351.h
|
||||
*
|
||||
* Created on: Feb 16, 2018
|
||||
* Author: Petr Polasek
|
||||
*
|
||||
* To make this library useable on any other device than
|
||||
* STM32Fxxx Cortex Mx, please edit these parts of the library:
|
||||
*
|
||||
* DEFINES:
|
||||
* SI5351_I2C_PERIPHERAL - the I2C peripheral name according
|
||||
* to your devices HAL library
|
||||
* I2C_TIMEOUT - time for the communication to time out
|
||||
*
|
||||
* TYPEDEFS:
|
||||
* Si5351_ConfigTypeDef - the I2Cx parameter should be changed
|
||||
* so that its type corresponds to your HAL library
|
||||
*
|
||||
* FUNCTIONS:
|
||||
* Si5351_WriteRegister
|
||||
* Si5351_ReadRegister
|
||||
* You need to write your own I2C handlers here
|
||||
*
|
||||
*/
|
||||
#if 0
|
||||
#ifndef ENABLESTATE
|
||||
#define ENABLESTATE
|
||||
typedef enum
|
||||
{
|
||||
OFF = 0,
|
||||
ON = 1
|
||||
} EnableState;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This section contains register addresses and bit masks for
|
||||
* the device status registers.
|
||||
*/
|
||||
|
||||
#define REG_DEV_STATUS 0
|
||||
#define DEV_SYS_INIT_MASK 0x80
|
||||
#define DEV_LOL_B_MASK 0x40
|
||||
#define DEV_LOL_A_MASK 0x20
|
||||
#define DEV_LOS_CLKIN_MASK 0x10
|
||||
#define DEV_LOS_XTAL_MASK 0x08
|
||||
#define DEV_REVID_MASK 0x03
|
||||
|
||||
#define REG_DEV_STICKY 1
|
||||
#define DEV_STKY_SYS_INIT_MASK 0x80
|
||||
#define DEV_STKY_LOL_B_MASK 0x40
|
||||
#define DEV_STKY_LOL_A_MASK 0x20
|
||||
#define DEV_STKY_LOS_CLKIN_MASK 0x10
|
||||
#define DEV_STKY_LOS_XTAL_MASK 0x08
|
||||
|
||||
#define REG_INT_MASK 2
|
||||
#define INT_MASK_SYS_INIT_MASK 0x80
|
||||
#define INT_MASK_LOL_B_MASK 0x40
|
||||
#define INT_MASK_LOL_A_MASK 0x20
|
||||
#define INT_MASK_LOS_CLKIN_MASK 0x10
|
||||
#define INT_MASK_LOS_XTAL_MASK 0x08
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* oscillator, VCXO and CLKIN section.
|
||||
*/
|
||||
|
||||
#define REG_XTAL_CL 183
|
||||
#define XTAL_CL_MASK 0xC0
|
||||
#define PLL_CL_MASK 0x36
|
||||
|
||||
//this sets the crystal load capacitance
|
||||
typedef enum
|
||||
{
|
||||
XTAL_Load_4_pF = 0x00,
|
||||
XTAL_Load_6_pF = 0x40,
|
||||
XTAL_Load_8_pF = 0x80,
|
||||
XTAL_Load_10_pF = 0xC0
|
||||
} Si5351_XTALLoadTypeDef;
|
||||
|
||||
//The following is an unexplained parameter. However someone from SiLabs called it "VCO load cap".
|
||||
//Lower settings seem to be more stable on higher frequencies, higher settings are more stable on lower frequencies allowing to tune the PLL to <200 MHz.
|
||||
typedef enum
|
||||
{
|
||||
PLL_Capacitive_Load_0 = 0,
|
||||
PLL_Capacitive_Load_1 = 1,
|
||||
PLL_Capacitive_Load_2 = 2
|
||||
} Si5351_PLLCapacitiveLoadTypeDef;
|
||||
|
||||
#define REG_CLKIN_DIV 15
|
||||
#define CLKIN_MASK 0xC0
|
||||
|
||||
//this sets the CLKIN pre-divider, after division, CLKIN should
|
||||
//fall between 10-40 MHz
|
||||
typedef enum
|
||||
{
|
||||
CLKINDiv_Div1 = 0x00,
|
||||
CLKINDiv_Div2 = 0x40,
|
||||
CLKINDiv_Div4 = 0x80,
|
||||
CLKINDiv_Div8 = 0xC0
|
||||
} Si5351_CLKINDivTypeDef;
|
||||
|
||||
#define REG_FANOUT_EN 187
|
||||
#define FANOUT_CLKIN_EN_MASK 0x80
|
||||
#define FANOUT_XO_EN_MASK 0x40
|
||||
#define FANOUT_MS_EN_MASK 0x10
|
||||
|
||||
#define REG_VCXO_PARAM_0_7 162
|
||||
#define REG_VCXO_PARAM_8_15 163
|
||||
#define REG_VCXO_PARAM_16_21 164
|
||||
#define VCXO_PARAM_16_21_MASK 0x3F
|
||||
#define VCXO_PARAM_MASK 0x003FFFFF
|
||||
|
||||
#define APR_MINIMUM 30 //minimum pull range
|
||||
#define APR_MAXIMUM 240 //maximum pull range
|
||||
|
||||
#define CLKIN_MINIMUM 10000 //minimum CLKIN frequency after division in kHz
|
||||
#define CLKIN_MAXIMUM 40000 //maximum CLKIN frequency after division in kHz
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Si5351_XTALLoadTypeDef OSC_XTAL_Load; //capacitive load of XTAL, 10pF by default
|
||||
Si5351_CLKINDivTypeDef CLKIN_Div; //CLKIN predivision, input f to PLL must be 10-40 MHz
|
||||
uint8_t VCXO_Pull_Range_ppm; //can range from +-30 ppm to 240ppm
|
||||
} Si5351_OSCConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* PLL (PLLA and PLLB)
|
||||
*/
|
||||
|
||||
#define REG_PLL_CLOCK_SOURCE 15
|
||||
#define PLLA_CLOCK_SOURCE_MASK 0x04
|
||||
#define PLLB_CLOCK_SOURCE_MASK 0x08
|
||||
|
||||
//this selects the clock source for the PLL
|
||||
typedef enum
|
||||
{
|
||||
PLL_Clock_Source_XTAL = 0x00,
|
||||
PLL_Clock_Source_CLKIN = 0x0C //0x04 for PLLA, 0x08 for PLLB, use mask!
|
||||
} Si5351_PLLClockSourceTypeDef;
|
||||
|
||||
#define REG_FB_INT 22
|
||||
#define FB_INT_MASK 0x40
|
||||
|
||||
#define REG_PLL_RESET 177
|
||||
#define PLLA_RESET_MASK 0x20
|
||||
#define PLLB_RESET_MASK 0x80
|
||||
|
||||
#define REG_MSN_P1_0_7 30
|
||||
#define REG_MSN_P1_8_15 29
|
||||
#define REG_MSN_P1_16_17 28
|
||||
#define MSN_P1_16_17_MASK 0x03
|
||||
|
||||
#define REG_MSN_P2_0_7 33
|
||||
#define REG_MSN_P2_8_15 32
|
||||
#define REG_MSN_P2_16_19 31
|
||||
#define MSN_P2_16_19_MASK 0x0F
|
||||
|
||||
#define REG_MSN_P3_0_7 27
|
||||
#define REG_MSN_P3_8_15 26
|
||||
#define REG_MSN_P3_16_19 31
|
||||
#define MSN_P3_16_19_MASK 0xF0
|
||||
|
||||
#define MSNA_MSNB_OFFSET 8
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t PLL_Multiplier_Integer;
|
||||
uint32_t PLL_Multiplier_Numerator;
|
||||
uint32_t PLL_Multiplier_Denominator;
|
||||
Si5351_PLLClockSourceTypeDef PLL_Clock_Source;
|
||||
Si5351_PLLCapacitiveLoadTypeDef PLL_Capacitive_Load;
|
||||
} Si5351_PLLConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* Spread Spectrum feature.
|
||||
*/
|
||||
|
||||
#define REG_SSC_MODE 151
|
||||
#define SSC_MODE_MASK 0x80
|
||||
|
||||
//this selects the Spread Spectrum mode
|
||||
typedef enum
|
||||
{
|
||||
SS_Mode_DownSpread = 0x00,
|
||||
SS_Mode_CenterSpread = 0x80
|
||||
} Si5351_SSModeTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SS_NCLK_0 = 0x00,
|
||||
SS_NCLK_1 = 0x10,
|
||||
SS_NCLK_2 = 0x20,
|
||||
SS_NCLK_3 = 0x30,
|
||||
SS_NCLK_4 = 0x40,
|
||||
SS_NCLK_5 = 0x50,
|
||||
SS_NCLK_6 = 0x60,
|
||||
SS_NCLK_7 = 0x70,
|
||||
SS_NCLK_8 = 0x80,
|
||||
SS_NCLK_9 = 0x90,
|
||||
SS_NCLK_10 = 0xA0,
|
||||
SS_NCLK_11 = 0xB0,
|
||||
SS_NCLK_12 = 0xC0,
|
||||
SS_NCLK_13 = 0xD0,
|
||||
SS_NCLK_14 = 0xE0,
|
||||
SS_NCLK_15 = 0xF0
|
||||
} Si5351_SSNCLKTypeDef;
|
||||
|
||||
#define REG_SSDN_P1_0_7 153
|
||||
#define REG_SSDN_P1_8_11 154
|
||||
#define SSDN_P1_8_11_MASK 0x0F
|
||||
|
||||
#define REG_SSDN_P2_0_7 150
|
||||
#define REG_SSDN_P2_8_14 149
|
||||
#define SSDN_P2_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSDN_P3_0_7 152
|
||||
#define REG_SSDN_P3_8_14 151
|
||||
#define SSDN_P3_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSUDP_0_7 155
|
||||
#define REG_SSUDP_8_11 154
|
||||
#define SSUDP_8_11_MASK 0xF0
|
||||
|
||||
#define REG_SSUP_P1_0_7 160
|
||||
#define REG_SSUP_P1_8_11 161
|
||||
#define SSUP_P1_8_11_MASK 0x0F
|
||||
|
||||
#define REG_SSUP_P2_0_7 157
|
||||
#define REG_SSUP_P2_8_14 156
|
||||
#define SSUP_P2_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSUP_P3_0_7 159
|
||||
#define REG_SSUP_P3_8_14 158
|
||||
#define SSUP_P3_8_14_MASK 0x7F
|
||||
|
||||
#define REG_SSC_EN 149
|
||||
#define SSC_EN_MASK 0x80
|
||||
|
||||
#define REG_SS_NCLK 161
|
||||
#define SS_NCLK_MASK 0xF0
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SS_Amplitude_ppm; //amplitude of the SS feature in ppm of center frequency
|
||||
EnableState SS_Enable;
|
||||
Si5351_SSModeTypeDef SS_Mode;
|
||||
Si5351_SSNCLKTypeDef SS_NCLK;
|
||||
} Si5351_SSConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* Output Multisynth.
|
||||
*/
|
||||
|
||||
//this selects the Multisynth clock source
|
||||
typedef enum
|
||||
{
|
||||
MS_Clock_Source_PLLA = 0x00,
|
||||
MS_Clock_Source_PLLB = 0x20
|
||||
} Si5351_MSClockSourceTypeDef;
|
||||
|
||||
#define REG_MS_P1_0_7 46
|
||||
#define REG_MS_P1_8_15 45
|
||||
#define REG_MS_P1_16_17 44
|
||||
#define MS_P1_16_17_MASK 0x03
|
||||
|
||||
#define REG_MS_P2_0_7 49
|
||||
#define REG_MS_P2_8_15 48
|
||||
#define REG_MS_P2_16_19 47
|
||||
#define MS_P2_16_19_MASK 0x0F
|
||||
|
||||
#define REG_MS_P3_0_7 43
|
||||
#define REG_MS_P3_8_15 42
|
||||
#define REG_MS_P3_16_19 47
|
||||
#define MS_P3_16_19_MASK 0xF0
|
||||
|
||||
#define REG_MS67_P1 90
|
||||
|
||||
#define REG_MS_INT 16
|
||||
#define MS_INT_MASK 0x40
|
||||
|
||||
#define REG_MS_DIVBY4 44
|
||||
#define MS_DIVBY4_MASK 0x0C
|
||||
|
||||
#define REG_MS_SRC 16
|
||||
#define MS_SRC_MASK 0x20
|
||||
|
||||
#define MS_SETUP_STEP 1
|
||||
#define MS_DIVIDER_STEP 8
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Si5351_MSClockSourceTypeDef MS_Clock_Source; //select source on MS input
|
||||
uint32_t MS_Divider_Integer; //the integer part of divider, called "a"
|
||||
uint32_t MS_Divider_Numerator; //the numerator, called "b"
|
||||
uint32_t MS_Divider_Denominator; //the denominator, called "c"
|
||||
} Si5351_MSConfigTypeDef; //sets MS divider ( a+(b/c) ) and clock (PLLA/PLLB)
|
||||
|
||||
/*
|
||||
* This section contains data structures for configuring the
|
||||
* CLK, R divider and output stage (joined together because they make
|
||||
* a tight block without any multiplexer).
|
||||
*/
|
||||
|
||||
#define REG_CLK_SRC 16
|
||||
#define CLK_SRC_MASK 0x0C
|
||||
|
||||
//this sets the CLK source clock
|
||||
typedef enum
|
||||
{
|
||||
CLK_Clock_Source_XTAL = 0x00,
|
||||
CLK_Clock_Source_CLKIN = 0x04,
|
||||
CLK_Clock_Source_MS0_MS4 = 0x08, //this uses MS0 for CLK0..3 and MS4 for CLK4..7
|
||||
CLK_Clock_Source_MS_Own = 0x0C //this uses MSx for CLKx
|
||||
} Si5351_CLKClockSourceTypeDef; //configures multiplexer on CLK input
|
||||
|
||||
#define REG_CLK_R_DIV 44
|
||||
#define CLK_R_DIV_MASK 0x70
|
||||
|
||||
#define REG_CLK_R67_DIV 92
|
||||
#define CLK_R67_DIV_MASK 0x07
|
||||
|
||||
//this sets the R divider ratio
|
||||
typedef enum
|
||||
{
|
||||
CLK_R_Div1 = 0x00,
|
||||
CLK_R_Div2 = 0x10,
|
||||
CLK_R_Div4 = 0x20,
|
||||
CLK_R_Div8 = 0x30,
|
||||
CLK_R_Div16 = 0x40,
|
||||
CLK_R_Div32 = 0x50,
|
||||
CLK_R_Div64 = 0x60,
|
||||
CLK_R_Div128 = 0x70
|
||||
} Si5351_CLKRDivTypeDef;
|
||||
|
||||
#define REG_CLK_DIS_STATE 24
|
||||
#define CLK_DIS_STATE_MASK 0x03
|
||||
|
||||
//this sets output buffer behaviour when disabled
|
||||
typedef enum
|
||||
{
|
||||
CLK_Disable_State_LOW = 0x00,
|
||||
CLK_Disable_State_HIGH = 0x01,
|
||||
CLK_Disable_State_HIGH_Z = 0x02, //three-stated when off
|
||||
CLK_Disable_State_ALWAYS_ON = 0x03 //cannot be disabled
|
||||
} Si5351_CLKDisableStateTypeDef;
|
||||
|
||||
#define REG_CLK_IDRV 16
|
||||
#define CLK_IDRV_MASK 0x03
|
||||
|
||||
//this sets current drive of the output buffer
|
||||
typedef enum
|
||||
{
|
||||
CLK_I_Drv_2mA = 0x00,
|
||||
CLK_I_Drv_4mA = 0x01,
|
||||
CLK_I_Drv_6mA = 0x02,
|
||||
CLK_I_Drv_8mA = 0x03
|
||||
} Si5351_CLKIDrvTypeDef;
|
||||
|
||||
#define REG_CLK_PHOFF 165
|
||||
#define CLK_PHOFF_MASK 0x7F
|
||||
|
||||
#define REG_CLK_EN 3
|
||||
|
||||
#define REG_CLK_INV 16
|
||||
#define CLK_INV_MASK 0x10
|
||||
|
||||
#define REG_CLK_PDN 16
|
||||
#define CLK_PDN_MASK 0x80
|
||||
|
||||
#define REG_CLK_OEB 9
|
||||
|
||||
#define CLK_PHOFF_STEP 1
|
||||
#define CLK_SETUP_STEP 1
|
||||
#define CLK_R_DIV_STEP 8
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Si5351_CLKClockSourceTypeDef CLK_Clock_Source; //clock source
|
||||
|
||||
/* this sets the time offset of the CLK channel, basic unit
|
||||
* is one quarter of the VCO period (90deg offset),
|
||||
* set it to 4*fVCO*toffset, the value is 7-bit, the max time offset
|
||||
* varies between 35 and 53 ns (1 cycle for 28 and 19 MHz, respectively)
|
||||
* according to the current frequency of the VCO
|
||||
*/
|
||||
uint8_t CLK_QuarterPeriod_Offset;
|
||||
|
||||
Si5351_CLKRDivTypeDef CLK_R_Div; //R divider value (only powers of 2)
|
||||
EnableState CLK_Invert; //invert output clock
|
||||
EnableState CLK_Enable; //enable flag
|
||||
EnableState CLK_PowerDown; //powerdown flag
|
||||
Si5351_CLKDisableStateTypeDef CLK_Disable_State; //sets output behaviour when disabled
|
||||
Si5351_CLKIDrvTypeDef CLK_I_Drv; //output driver current drive strength
|
||||
EnableState CLK_Use_OEB_Pin; //allows using OEB pin to enable clock
|
||||
} Si5351_CLKConfigTypeDef;
|
||||
|
||||
/*
|
||||
* This section contains main data structure for Si5351 configuration
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/*
|
||||
* These are frequencies of the input clocks, set it in Hz.
|
||||
*/
|
||||
uint32_t f_XTAL;
|
||||
uint32_t f_CLKIN;
|
||||
|
||||
//Interrupt masking - enabling it disables the int source from pulling INTR low
|
||||
EnableState Interrupt_Mask_SysInit;
|
||||
EnableState Interrupt_Mask_PLLB;
|
||||
EnableState Interrupt_Mask_PLLA;
|
||||
EnableState Interrupt_Mask_CLKIN;
|
||||
EnableState Interrupt_Mask_XTAL;
|
||||
|
||||
//Fanout enable - enables internal clock routing
|
||||
EnableState Fanout_MS_EN;
|
||||
EnableState Fanout_XO_EN;
|
||||
EnableState Fanout_CLKIN_EN;
|
||||
|
||||
I2C_TypeDef *I2Cx; //the I2C interface that will be used
|
||||
uint8_t HW_I2C_Address; //I2C address of the Si5351 for the packages with A0 pin
|
||||
//(also, some duds with strange address reported)
|
||||
Si5351_OSCConfigTypeDef OSC; //Oscillator, CLKIN and VCXO settings
|
||||
Si5351_PLLConfigTypeDef PLL[2]; //PLL settings for PLLA and PLLB
|
||||
Si5351_MSConfigTypeDef MS[8]; //MultiSynth[0..7] settings
|
||||
Si5351_CLKConfigTypeDef CLK[8]; //CLK[0..7], R divider and output stage settings
|
||||
Si5351_SSConfigTypeDef SS; //spread spectrum settings
|
||||
} Si5351_ConfigTypeDef;
|
||||
|
||||
/*
|
||||
* Typedefs for selecting PLL, MS and CLK to be used
|
||||
*/
|
||||
|
||||
//this selects PLL channel
|
||||
typedef enum
|
||||
{
|
||||
PLL_A = 0,
|
||||
PLL_B = 1
|
||||
} Si5351_PLLChannelTypeDef;
|
||||
|
||||
//this selects Multisynth channel
|
||||
typedef enum
|
||||
{
|
||||
MS0 = 0,
|
||||
MS1 = 1,
|
||||
MS2 = 2,
|
||||
MS3 = 3,
|
||||
MS4 = 4,
|
||||
MS5 = 5,
|
||||
MS6 = 6,
|
||||
MS7 = 7
|
||||
} Si5351_MSChannelTypeDef;
|
||||
|
||||
//this selects CLK channel
|
||||
typedef enum
|
||||
{
|
||||
CLK0 = 0,
|
||||
CLK1 = 1,
|
||||
CLK2 = 2,
|
||||
CLK3 = 3,
|
||||
CLK4 = 4,
|
||||
CLK5 = 5,
|
||||
CLK6 = 6,
|
||||
CLK7 = 7
|
||||
} Si5351_CLKChannelTypeDef;
|
||||
|
||||
//this selects device status flag
|
||||
typedef enum
|
||||
{
|
||||
StatusBit_SysInit = DEV_SYS_INIT_MASK,
|
||||
StatusBit_PLLA = DEV_STKY_LOL_A_MASK,
|
||||
StatusBit_PLLB = DEV_LOL_B_MASK,
|
||||
StatusBit_CLKIN = DEV_LOS_CLKIN_MASK,
|
||||
StatusBit_XTAL = DEV_LOS_XTAL_MASK,
|
||||
} Si5351_StatusBitTypeDef;
|
||||
|
||||
//these write to and read from a Si5351 register, for porting
|
||||
//purposes, these functions should be the only ones which should need edits
|
||||
int Si5351_WriteRegister(Si5351_ConfigTypeDef *Si5351_ConfigStruct, uint8_t reg_address, uint8_t reg_data);
|
||||
uint8_t Si5351_ReadRegister(Si5351_ConfigTypeDef *Si5351_ConfigStruct, uint8_t reg_address);
|
||||
|
||||
void Si5351_StructInit(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
void Si5351_OSCConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
EnableState Si5351_CheckStatusBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
|
||||
EnableState Si5351_CheckStickyBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
|
||||
void Si5351_InterruptConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
void Si5351_ClearStickyBit(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_StatusBitTypeDef StatusBit);
|
||||
|
||||
void Si5351_PLLConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_PLLChannelTypeDef PLL_Channel);
|
||||
void Si5351_PLLReset(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_PLLChannelTypeDef PLL_Channel);
|
||||
void Si5351_PLLSimultaneousReset(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
void Si5351_SSConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
|
||||
void Si5351_MSConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_MSChannelTypeDef MS_Channel);
|
||||
|
||||
void Si5351_CLKPowerCmd(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_CLKChannelTypeDef CLK_Channel);
|
||||
void Si5351_CLKConfig(Si5351_ConfigTypeDef *Si5351_ConfigStruct, Si5351_CLKChannelTypeDef CLK_Channel);
|
||||
|
||||
int Si5351_Init(Si5351_ConfigTypeDef *Si5351_ConfigStruct);
|
||||
#endif /* SI5351_H_ */
|
||||
|
||||
482
Core/Inc/stm32l4xx_hal_conf.h
Normal file
482
Core/Inc/stm32l4xx_hal_conf.h
Normal file
@ -0,0 +1,482 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l4xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration template file.
|
||||
* This file should be copied to the application folder and renamed
|
||||
* to stm32l4xx_hal_conf.h.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32L4xx_HAL_CONF_H
|
||||
#define STM32L4xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
/*#define HAL_ADC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
/*#define HAL_CAN_MODULE_ENABLED */
|
||||
/*#define HAL_COMP_MODULE_ENABLED */
|
||||
/*#define HAL_CRC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
/*#define HAL_DAC_MODULE_ENABLED */
|
||||
/*#define HAL_DCMI_MODULE_ENABLED */
|
||||
/*#define HAL_DMA2D_MODULE_ENABLED */
|
||||
/*#define HAL_DFSDM_MODULE_ENABLED */
|
||||
/*#define HAL_DSI_MODULE_ENABLED */
|
||||
/*#define HAL_FIREWALL_MODULE_ENABLED */
|
||||
/*#define HAL_GFXMMU_MODULE_ENABLED */
|
||||
/*#define HAL_HCD_MODULE_ENABLED */
|
||||
/*#define HAL_HASH_MODULE_ENABLED */
|
||||
/*#define HAL_I2S_MODULE_ENABLED */
|
||||
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
/*#define HAL_LTDC_MODULE_ENABLED */
|
||||
/*#define HAL_LCD_MODULE_ENABLED */
|
||||
/*#define HAL_LPTIM_MODULE_ENABLED */
|
||||
/*#define HAL_MMC_MODULE_ENABLED */
|
||||
/*#define HAL_NAND_MODULE_ENABLED */
|
||||
/*#define HAL_NOR_MODULE_ENABLED */
|
||||
/*#define HAL_OPAMP_MODULE_ENABLED */
|
||||
/*#define HAL_OSPI_MODULE_ENABLED */
|
||||
/*#define HAL_OSPI_MODULE_ENABLED */
|
||||
#define HAL_PCD_MODULE_ENABLED
|
||||
/*#define HAL_PKA_MODULE_ENABLED */
|
||||
/*#define HAL_QSPI_MODULE_ENABLED */
|
||||
/*#define HAL_QSPI_MODULE_ENABLED */
|
||||
/*#define HAL_RNG_MODULE_ENABLED */
|
||||
/*#define HAL_RTC_MODULE_ENABLED */
|
||||
/*#define HAL_SAI_MODULE_ENABLED */
|
||||
/*#define HAL_SD_MODULE_ENABLED */
|
||||
/*#define HAL_SMBUS_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
/*#define HAL_SWPMI_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
/*#define HAL_TSC_MODULE_ENABLED */
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/*#define HAL_USART_MODULE_ENABLED */
|
||||
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||
/*#define HAL_EXTI_MODULE_ENABLED */
|
||||
/*#define HAL_PSSI_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (MSI) default value.
|
||||
* This value is the default MSI range value after Reset.
|
||||
*/
|
||||
#if !defined (MSI_VALUE)
|
||||
#define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* MSI_VALUE */
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
|
||||
* This internal oscillator is mainly dedicated to provide a high precision clock to
|
||||
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
|
||||
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
|
||||
* which is subject to manufacturing process variations.
|
||||
*/
|
||||
#if !defined (HSI48_VALUE)
|
||||
#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
|
||||
The real value my vary depending on manufacturing process variations.*/
|
||||
#endif /* HSI48_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for SAI1 peripheral
|
||||
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
|
||||
* frequency.
|
||||
*/
|
||||
#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
|
||||
#define EXTERNAL_SAI1_CLOCK_VALUE 2097000U /*!< Value of the SAI1 External clock source in Hz*/
|
||||
#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
|
||||
|
||||
/**
|
||||
* @brief External clock source for SAI2 peripheral
|
||||
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
|
||||
* frequency.
|
||||
*/
|
||||
#if !defined (EXTERNAL_SAI2_CLOCK_VALUE)
|
||||
#define EXTERNAL_SAI2_CLOCK_VALUE 2097000U /*!< Value of the SAI2 External clock source in Hz*/
|
||||
#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 0U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Register callback feature configuration ############### */
|
||||
/**
|
||||
* @brief Set below the peripheral configuration to "1U" to add the support
|
||||
* of HAL callback registration/deregistration feature for the HAL
|
||||
* driver(s). This allows user application to provide specific callback
|
||||
* functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
|
||||
* the default weak callback functions (see each stm32l4xx_hal_ppp.h file
|
||||
* for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
|
||||
* for each PPP peripheral).
|
||||
*/
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_TSC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "Legacy/stm32l4xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GFXMMU_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_gfxmmu.h"
|
||||
#endif /* HAL_GFXMMU_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FIREWALL_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_firewall.h"
|
||||
#endif /* HAL_FIREWALL_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LCD_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_lcd.h"
|
||||
#endif /* HAL_LCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_opamp.h"
|
||||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_ospi.h"
|
||||
#endif /* HAL_OSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PKA_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_pka.h"
|
||||
#endif /* HAL_PKA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PSSI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_pssi.h"
|
||||
#endif /* HAL_PSSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SWPMI_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_swpmi.h"
|
||||
#endif /* HAL_SWPMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TSC_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_tsc.h"
|
||||
#endif /* HAL_TSC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32l4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32L4xx_HAL_CONF_H */
|
||||
65
Core/Inc/stm32l4xx_it.h
Normal file
65
Core/Inc/stm32l4xx_it.h
Normal file
@ -0,0 +1,65 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l4xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L4xx_IT_H
|
||||
#define __STM32L4xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void TIM1_UP_TIM16_IRQHandler(void);
|
||||
void LPUART1_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L4xx_IT_H */
|
||||
Reference in New Issue
Block a user