308 lines
11 KiB
C
308 lines
11 KiB
C
/**
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******************************************************************************
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* @file stm32l4xx_hal_dma_ex.c
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* @author MCD Application Team
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* @brief DMA Extension HAL module driver
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* This file provides firmware functions to manage the following
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* functionalities of the DMA Extension peripheral:
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* + Extended features functions
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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The DMA Extension HAL driver can be used as follows:
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(+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
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(+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function.
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Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used
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to respectively enable/disable the request generator.
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(+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called from
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the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler.
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As only one interrupt line is available for all DMAMUX channels and request generators , HAL_DMAEx_MUX_IRQHandler should be
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called with, as parameter, the appropriate DMA handle as many as used DMAs in the user project
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(exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator)
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-@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
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-@- When Multi (Double) Buffer mode is enabled, the transfer is circular by default.
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-@- In Multi (Double) buffer mode, it is possible to update the base address for
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the AHB memory port on the fly (DMA_CM0ARx or DMA_CM1ARx) when the channel is enabled.
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@endverbatim
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_hal.h"
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#if defined(DMAMUX1)
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/** @addtogroup STM32L4xx_HAL_Driver
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* @{
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*/
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/** @defgroup DMAEx DMAEx
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* @brief DMA Extended HAL module driver
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* @{
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*/
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#ifdef HAL_DMA_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private Constants ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
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* @{
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*/
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/** @defgroup DMAEx_Exported_Functions_Group1 DMAEx Extended features functions
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* @brief Extended features functions
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*
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@verbatim
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===============================================================================
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##### Extended features functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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(+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
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(+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function.
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Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used
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to respectively enable/disable the request generator.
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@endverbatim
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* @{
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*/
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/**
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* @brief Configure the DMAMUX synchronization parameters for a given DMA channel (instance).
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA channel.
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* @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchronization parameters
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig)
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{
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/* Check the parameters */
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assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID));
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assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig-> SyncPolarity));
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assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable));
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assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable));
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assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber));
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/*Check if the DMA state is ready */
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if(hdma->State == HAL_DMA_STATE_READY)
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{
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/* Process Locked */
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__HAL_LOCK(hdma);
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/* Set the new synchronization parameters (and keep the request ID filled during the Init)*/
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MODIFY_REG( hdma->DMAmuxChannel->CCR, \
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(~DMAMUX_CxCR_DMAREQ_ID) , \
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((pSyncConfig->SyncSignalID) << DMAMUX_CxCR_SYNC_ID_Pos) | ((pSyncConfig->RequestNumber - 1U) << DMAMUX_CxCR_NBREQ_Pos) | \
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pSyncConfig->SyncPolarity | ((uint32_t)pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos) | \
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((uint32_t)pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos));
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/* Process UnLocked */
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__HAL_UNLOCK(hdma);
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return HAL_OK;
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}
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else
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{
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/*DMA State not Ready*/
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return HAL_ERROR;
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}
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}
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/**
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* @brief Configure the DMAMUX request generator block used by the given DMA channel (instance).
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA channel.
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* @param pRequestGeneratorConfig : pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef :
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* contains the request generator parameters.
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*
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
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{
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/* Check the parameters */
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assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID));
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assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity));
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assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber));
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/* check if the DMA state is ready
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and DMA is using a DMAMUX request generator block
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*/
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if((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U))
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{
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/* Process Locked */
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__HAL_LOCK(hdma);
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/* Set the request generator new parameters */
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hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \
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((pRequestGeneratorConfig->RequestNumber - 1U) << DMAMUX_RGxCR_GNBREQ_Pos)| \
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pRequestGeneratorConfig->Polarity;
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/* Process UnLocked */
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__HAL_UNLOCK(hdma);
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return HAL_OK;
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}
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else
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{
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return HAL_ERROR;
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}
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}
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/**
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* @brief Enable the DMAMUX request generator block used by the given DMA channel (instance).
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA channel.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
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{
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/* Check the parameters */
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assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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/* check if the DMA state is ready
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and DMA is using a DMAMUX request generator block
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*/
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if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
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{
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/* Enable the request generator*/
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hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE;
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return HAL_OK;
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}
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else
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{
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return HAL_ERROR;
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}
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}
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/**
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* @brief Disable the DMAMUX request generator block used by the given DMA channel (instance).
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA channel.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
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{
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/* Check the parameters */
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assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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/* check if the DMA state is ready
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and DMA is using a DMAMUX request generator block
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*/
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if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
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{
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/* Disable the request generator*/
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hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE;
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return HAL_OK;
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}
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else
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{
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return HAL_ERROR;
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}
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}
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/**
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* @brief Handles DMAMUX interrupt request.
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA channel.
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* @retval None
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*/
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void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
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{
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/* Check for DMAMUX Synchronization overrun */
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if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
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{
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/* Disable the synchro overrun interrupt */
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hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
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/* Clear the DMAMUX synchro overrun flag */
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hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
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/* Update error code */
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hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
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if(hdma->XferErrorCallback != NULL)
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{
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/* Transfer error callback */
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hdma->XferErrorCallback(hdma);
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}
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}
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if(hdma->DMAmuxRequestGen != 0)
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{
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/* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */
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if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
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{
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/* Disable the request gen overrun interrupt */
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hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
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/* Clear the DMAMUX request generator overrun flag */
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hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
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/* Update error code */
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hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
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if(hdma->XferErrorCallback != NULL)
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{
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/* Transfer error callback */
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hdma->XferErrorCallback(hdma);
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}
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}
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}
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* HAL_DMA_MODULE_ENABLED */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* DMAMUX1 */
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