Makefile: create a template compiler

This creates a simple template compiler using sed in as a reusable
variable.

Signed-off-by: Kai Krakow <kai@kaishome.de>

Defines.mk

@@ -0,0 +1,8 @@
+MAKE += PREFIX=$(PREFIX) LIBEXEC_PREFIX=$(LIBEXEC_PREFIX) ETC_PREFIX=$(ETC_PREFIX)
+
+define TEMPLATE_COMPILER =
+sed $< >$@ \
+		-e's#@PREFIX@#$(PREFIX)#' \
+		-e's#@ETC_PREFIX@#$(ETC_PREFIX)#' \
+		-e's#@LIBEXEC_PREFIX@#$(LIBEXEC_PREFIX)#'
+endef

Makefile

@@ -18,6 +18,8 @@ ifeq ($(DEFAULT_MAKE_TARGET),reallyall)
 	RUN_INSTALL_TESTS = test
 endif
 
+include Defines.mk
+
 default: $(DEFAULT_MAKE_TARGET)
 
 all: lib src scripts README.html
@@ -40,10 +42,7 @@ test: lib src
 	$(MAKE) -C test
 
 scripts/%: scripts/%.in
-	sed $< >$@ \
-		-e's#@PREFIX@#$(PREFIX)#' \
-		-e's#@ETC_PREFIX@#$(ETC_PREFIX)#' \
-		-e's#@LIBEXEC_PREFIX@#$(LIBEXEC_PREFIX)#'
+	$(TEMPLATE_COMPILER)
 
 scripts: scripts/beesd scripts/beesd@.service